Commits · d1991e9952ca77afe9ab598aa679a75eb3b3d5b2 · Wenxi XU / zephyr · GitLab

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Dec 16, 2021
- twister: remove lock from generated hardware map · d1991e99
  Anas Nashif authored Dec 14, 2021
  d1991e99
Dec 15, 2021
- twister: log error for non-existing platform call · 3194f750
  Piotr Golyzniak authored Dec 10, 2021
  3194f750
- dts: arm: Fix warning on STM32L010XB boards · ecff0289
  Wouter Cappelle authored Dec 15, 2021
  ecff0289
- bluetooth: tester: allow to set DisplayYesNo IO capability · 0f6dc7a3
  Krzysztof Kopyściński authored Dec 09, 2021
  0f6dc7a3
- pm: policy: header cleanup · 4cc018bc
  Gerard Marull-Paretas authored Dec 13, 2021
  4cc018bc
- pm: policy: s/policy_residency.c/residency.c · a2696542
  Gerard Marull-Paretas authored Dec 13, 2021
  a2696542
- pm: policy: delete redundant PM_POLICY_RESIDENCY_DEFAULT config · d03307bf
  Gerard Marull-Paretas authored Dec 13, 2021
  d03307bf
- pm: policy: drop dummy policy · 80021f24
  Gerard Marull-Paretas authored Dec 13, 2021
  80021f24
- pm: policy: residency: add compile time checks for timings · 03232f92
  Gerard Marull-Paretas authored Dec 13, 2021
  03232f92
- pm: policy: residency: improve DT collection · d5036eca
  Gerard Marull-Paretas authored Dec 13, 2021
  d5036eca
- pm: policy: residency: improve readability · 25fb8664
  Gerard Marull-Paretas authored Dec 13, 2021
  25fb8664
- pm: policy: residency: constify and make uint8_t states_per_cpu · 12915727
  Gerard Marull-Paretas authored Dec 13, 2021
  12915727
- pm: policy: residency: s/pm_min_residency/cpus_states · dbfb0dcb
  Gerard Marull-Paretas authored Dec 13, 2021
  dbfb0dcb
- pm: policy: residency: s/pm_min_residency_sizes/states_per_cpu · ba39c988
  Gerard Marull-Paretas authored Dec 13, 2021
  ba39c988
- pm: policy: residency: s/CPU_STATES_SIZE/NUM_CPU_STATES · b176edea
  Gerard Marull-Paretas authored Dec 13, 2021
  b176edea
- soc/intel_adsp: Unbreak xcc builds · 66e2ba13
  Andy Ross authored Dec 14, 2021
  66e2ba13
- soc/intel_adsp: Simplify boot SRAM initialization · bc6abbc1
  Andy Ross authored Dec 12, 2021
  bc6abbc1
- soc/intel_adsp: Correct LP-SRAM sizes in DTS · 9eca65de
  Andy Ross authored Dec 13, 2021
  9eca65de
- soc/intel_adsp: Remove ipc.h · 35f906e6
  Andy Ross authored Dec 11, 2021
  35f906e6
- soc/intel_adsp: Remove adsp/io.h · 9ac2c214
  Andy Ross authored Dec 11, 2021
  9ac2c214
- soc/intel_adsp: Move cache coherence API into soc.h · 06e66148
  Andy Ross authored Dec 11, 2021
  06e66148
- soc/intel_adsp: Put a guard around CAVS_VERSION · 75c8a0c9
  Andy Ross authored Dec 11, 2021
  75c8a0c9
- soc/intel_adsp: Remove cavs/cpu.h · 797dd7ea
  Andy Ross authored Dec 11, 2021
  797dd7ea
- soc/intel_adsp: Linkage cleanup · 24855f71
  Andy Ross authored Dec 11, 2021
  24855f71
- soc/intel_adsp: Remove platform.h · c2204aba
  Andy Ross authored Dec 11, 2021
  c2204aba
- soc/intel_adsp: Linkage rework · 68095937
  Andy Ross authored Dec 10, 2021
  68095937
- soc/intel_adsp: Remove spurious 4k padding of .text section · 429a5fb4
  Andy Ross authored Dec 10, 2021
  429a5fb4
- soc/intel_adsp: Move window setup into bootloader · cc1158c3
  Andy Ross authored Dec 10, 2021
  cc1158c3
- soc/intel_adsp: Move initialization code to IMR · 184b795c
  Andy Ross authored Dec 10, 2021
  184b795c
- soc/intel_adsp: Replace Zephyr assembly entry stub · 3d654df1
  Andy Ross authored Dec 10, 2021
  3d654df1
- soc/intel_adsp: Remove dead bootloader framework · 524e33ed
  Andy Ross authored Dec 10, 2021
  524e33ed
- soc/intel_adsp: Build bootloader with Zephyr · 2906d1aa
  Andy Ross authored Dec 10, 2021
  2906d1aa
- arch/xtensa: Make cache utilities ALWAYS_INLINE · 79746d70
  Andy Ross authored Dec 10, 2021
  79746d70
- soc/intel_adsp: Bootloader refactoring: separate linkage for IMR memory · 59ad4c40
  Andy Ross authored Dec 10, 2021
  59ad4c40
- soc/intel_adsp: Unify Xtensa CPU reset between cores · 1a2fecec
  Andy Ross authored Dec 09, 2021
  1a2fecec
- soc/intel_adsp: Refactor boot loader initialization path · 887eeb74
  Andy Ross authored Dec 07, 2021
  887eeb74
- soc/intel_adsp: Rework Xtensa region protection initialization · 1a9310ef
  Andy Ross authored Dec 09, 2021
  1a9310ef
- soc/intel_adsp: Align .rodata with .data in bootloader · f1e941ac
  Andy Ross authored Dec 07, 2021
  f1e941ac
- soc/intel_adsp: Remove dead code in bootloader · fd622eb4
  Andy Ross authored Dec 07, 2021
  fd622eb4
- soc/intel_adsp: Refactor, move CPU init into a separate header · b6635456
  Andy Ross authored Dec 03, 2021
  b6635456

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