Commit 3908895f authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'v5.7-next-dts64.2' of... 

Merge tag 'v5.7-next-dts64.2' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/dt

mt8183:
- add PMIC mt6358
- add MMC node

mt2712:
- enable APDMA for the uart node
- add ethernet gmac node

mmsys:
- change node name to syscon as mmsys no longer represents only clocks
  but also the DRM subsystem

* tag 'v5.7-next-dts64.2' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
  arm: dts: mt2712: add uart APDMA to device tree
  arm64: dts: mt8183: add mmc node
  arm64: dts: mt2712: add ethernet device node
  arm64: dts: mt6358: add PMIC MT6358 related nodes
  arm64: dts: mt6797: Fix mmsys node name
  arm64: dts: mt8173: Fix mmsys node name

Link: https://lore.kernel.org/r/7c9f85c7-5b13-38e3-7a1f-a3cd6461b095@gmail.com


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 28ed0a0b 21eb9ec7

arch/arm64/boot/dts/mediatek/mt2712-evb.dts

+74 −0
Original line number Diff line number Diff line
@@ -105,7 +105,81 @@ 
	proc-supply = <&cpus_fixed_vproc1>;

};



&eth {

	phy-mode ="rgmii-rxid";

	phy-handle = <&ethernet_phy0>;

	mediatek,tx-delay-ps = <1530>;

	snps,reset-gpio = <&pio 87 GPIO_ACTIVE_LOW>;

	pinctrl-names = "default", "sleep";

	pinctrl-0 = <&eth_default>;

	pinctrl-1 = <&eth_sleep>;

	status = "okay";



	mdio {

		compatible = "snps,dwmac-mdio";

		#address-cells = <1>;

		#size-cells = <0>;

		ethernet_phy0: ethernet-phy@5 {

			compatible = "ethernet-phy-id0243.0d90";

			reg = <0x5>;

		};

	};

};



&pio {

	eth_default: eth_default {

		tx_pins {

			pinmux = <MT2712_PIN_71_GBE_TXD3__FUNC_GBE_TXD3>,

				 <MT2712_PIN_72_GBE_TXD2__FUNC_GBE_TXD2>,

				 <MT2712_PIN_73_GBE_TXD1__FUNC_GBE_TXD1>,

				 <MT2712_PIN_74_GBE_TXD0__FUNC_GBE_TXD0>,

				 <MT2712_PIN_75_GBE_TXC__FUNC_GBE_TXC>,

				 <MT2712_PIN_76_GBE_TXEN__FUNC_GBE_TXEN>;

			drive-strength = <MTK_DRIVE_8mA>;

		};

		rx_pins {

			pinmux = <MT2712_PIN_78_GBE_RXD3__FUNC_GBE_RXD3>,

				 <MT2712_PIN_79_GBE_RXD2__FUNC_GBE_RXD2>,

				 <MT2712_PIN_80_GBE_RXD1__FUNC_GBE_RXD1>,

				 <MT2712_PIN_81_GBE_RXD0__FUNC_GBE_RXD0>,

				 <MT2712_PIN_82_GBE_RXDV__FUNC_GBE_RXDV>,

				 <MT2712_PIN_84_GBE_RXC__FUNC_GBE_RXC>;

			input-enable;

		};

		mdio_pins {

			pinmux = <MT2712_PIN_85_GBE_MDC__FUNC_GBE_MDC>,

				 <MT2712_PIN_86_GBE_MDIO__FUNC_GBE_MDIO>;

			drive-strength = <MTK_DRIVE_8mA>;

			input-enable;

		};

	};



	eth_sleep: eth_sleep {

		tx_pins {

			pinmux = <MT2712_PIN_71_GBE_TXD3__FUNC_GPIO71>,

				 <MT2712_PIN_72_GBE_TXD2__FUNC_GPIO72>,

				 <MT2712_PIN_73_GBE_TXD1__FUNC_GPIO73>,

				 <MT2712_PIN_74_GBE_TXD0__FUNC_GPIO74>,

				 <MT2712_PIN_75_GBE_TXC__FUNC_GPIO75>,

				 <MT2712_PIN_76_GBE_TXEN__FUNC_GPIO76>;

		};

		rx_pins {

			pinmux = <MT2712_PIN_78_GBE_RXD3__FUNC_GPIO78>,

				 <MT2712_PIN_79_GBE_RXD2__FUNC_GPIO79>,

				 <MT2712_PIN_80_GBE_RXD1__FUNC_GPIO80>,

				 <MT2712_PIN_81_GBE_RXD0__FUNC_GPIO81>,

				 <MT2712_PIN_82_GBE_RXDV__FUNC_GPIO82>,

				 <MT2712_PIN_84_GBE_RXC__FUNC_GPIO84>;

			input-disable;

		};

		mdio_pins {

			pinmux = <MT2712_PIN_85_GBE_MDC__FUNC_GPIO85>,

				 <MT2712_PIN_86_GBE_MDIO__FUNC_GPIO86>;

			input-disable;

			bias-disable;

		};

	};



	usb0_id_pins_float: usb0_iddig {

		pins_iddig {

			pinmux = <MT2712_PIN_12_IDDIG_P0__FUNC_IDDIG_A>;

arch/arm64/boot/dts/mediatek/mt2712e.dtsi

+116 −0
Original line number Diff line number Diff line
@@ -300,6 +300,9 @@ 
		interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_LOW>;

		clocks = <&baud_clk>, <&sys_clk>;

		clock-names = "baud", "bus";

		dmas = <&apdma 10

			&apdma 11>;

		dma-names = "tx", "rx";

		status = "disabled";

	};
@@ -375,6 +378,39 @@ 
			 (GIC_CPU_MASK_RAW(0x13) | IRQ_TYPE_LEVEL_HIGH)>;

	};



	apdma: dma-controller@11000400 {

		compatible = "mediatek,mt2712-uart-dma",

			     "mediatek,mt6577-uart-dma";

		reg = <0 0x11000400 0 0x80>,

		      <0 0x11000480 0 0x80>,

		      <0 0x11000500 0 0x80>,

		      <0 0x11000580 0 0x80>,

		      <0 0x11000600 0 0x80>,

		      <0 0x11000680 0 0x80>,

		      <0 0x11000700 0 0x80>,

		      <0 0x11000780 0 0x80>,

		      <0 0x11000800 0 0x80>,

		      <0 0x11000880 0 0x80>,

		      <0 0x11000900 0 0x80>,

		      <0 0x11000980 0 0x80>;

		interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_LOW>,

			     <GIC_SPI 104 IRQ_TYPE_LEVEL_LOW>,

			     <GIC_SPI 105 IRQ_TYPE_LEVEL_LOW>,

			     <GIC_SPI 106 IRQ_TYPE_LEVEL_LOW>,

			     <GIC_SPI 107 IRQ_TYPE_LEVEL_LOW>,

			     <GIC_SPI 108 IRQ_TYPE_LEVEL_LOW>,

			     <GIC_SPI 109 IRQ_TYPE_LEVEL_LOW>,

			     <GIC_SPI 110 IRQ_TYPE_LEVEL_LOW>,

			     <GIC_SPI 111 IRQ_TYPE_LEVEL_LOW>,

			     <GIC_SPI 112 IRQ_TYPE_LEVEL_LOW>,

			     <GIC_SPI 113 IRQ_TYPE_LEVEL_LOW>,

			     <GIC_SPI 114 IRQ_TYPE_LEVEL_LOW>;

		dma-requests = <12>;

		clocks = <&pericfg CLK_PERI_AP_DMA>;

		clock-names = "apdma";

		#dma-cells = <1>;

	};



	auxadc: adc@11001000 {

		compatible = "mediatek,mt2712-auxadc";

		reg = <0 0x11001000 0 0x1000>;
@@ -391,6 +427,9 @@ 
		interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>;

		clocks = <&baud_clk>, <&sys_clk>;

		clock-names = "baud", "bus";

		dmas = <&apdma 0

			&apdma 1>;

		dma-names = "tx", "rx";

		status = "disabled";

	};
@@ -401,6 +440,9 @@ 
		interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_LOW>;

		clocks = <&baud_clk>, <&sys_clk>;

		clock-names = "baud", "bus";

		dmas = <&apdma 2

			&apdma 3>;

		dma-names = "tx", "rx";

		status = "disabled";

	};
@@ -411,6 +453,9 @@ 
		interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_LOW>;

		clocks = <&baud_clk>, <&sys_clk>;

		clock-names = "baud", "bus";

		dmas = <&apdma 4

			&apdma 5>;

		dma-names = "tx", "rx";

		status = "disabled";

	};
@@ -421,6 +466,9 @@ 
		interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_LOW>;

		clocks = <&baud_clk>, <&sys_clk>;

		clock-names = "baud", "bus";

		dmas = <&apdma 6

			&apdma 7>;

		dma-names = "tx", "rx";

		status = "disabled";

	};
@@ -635,6 +683,74 @@ 
		interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_LOW>;

		clocks = <&baud_clk>, <&sys_clk>;

		clock-names = "baud", "bus";

		dmas = <&apdma 8

			&apdma 9>;

		dma-names = "tx", "rx";

		status = "disabled";

	};



	stmmac_axi_setup: stmmac-axi-config {

		snps,wr_osr_lmt = <0x7>;

		snps,rd_osr_lmt = <0x7>;

		snps,blen = <0 0 0 0 16 8 4>;

	};



	mtl_rx_setup: rx-queues-config {

		snps,rx-queues-to-use = <1>;

		snps,rx-sched-sp;

		queue0 {

			snps,dcb-algorithm;

			snps,map-to-dma-channel = <0x0>;

			snps,priority = <0x0>;

		};

	};



	mtl_tx_setup: tx-queues-config {

		snps,tx-queues-to-use = <3>;

		snps,tx-sched-wrr;

		queue0 {

			snps,weight = <0x10>;

			snps,dcb-algorithm;

			snps,priority = <0x0>;

		};

		queue1 {

			snps,weight = <0x11>;

			snps,dcb-algorithm;

			snps,priority = <0x1>;

		};

		queue2 {

			snps,weight = <0x12>;

			snps,dcb-algorithm;

			snps,priority = <0x2>;

		};

	};



	eth: ethernet@1101c000 {

		compatible = "mediatek,mt2712-gmac";

		reg = <0 0x1101c000 0 0x1300>;

		interrupts = <GIC_SPI 237 IRQ_TYPE_LEVEL_LOW>;

		interrupt-names = "macirq";

		mac-address = [00 55 7b b5 7d f7];

		clock-names = "axi",

			      "apb",

			      "mac_main",

			      "ptp_ref";

		clocks = <&pericfg CLK_PERI_GMAC>,

			 <&pericfg CLK_PERI_GMAC_PCLK>,

			 <&topckgen CLK_TOP_ETHER_125M_SEL>,

			 <&topckgen CLK_TOP_ETHER_50M_SEL>;

		assigned-clocks = <&topckgen CLK_TOP_ETHER_125M_SEL>,

				  <&topckgen CLK_TOP_ETHER_50M_SEL>;

		assigned-clock-parents = <&topckgen CLK_TOP_ETHERPLL_125M>,

					 <&topckgen CLK_TOP_APLL1_D3>;

		power-domains = <&scpsys MT2712_POWER_DOMAIN_AUDIO>;

		mediatek,pericfg = <&pericfg>;

		snps,axi-config = <&stmmac_axi_setup>;

		snps,mtl-rx-config = <&mtl_rx_setup>;

		snps,mtl-tx-config = <&mtl_tx_setup>;

		snps,txpbl = <1>;

		snps,rxpbl = <1>;

		clk_csr = <0>;

		status = "disabled";

	};

arch/arm64/boot/dts/mediatek/mt6358.dtsi

0 → 100644
+358 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: (GPL-2.0 OR MIT)

/*

 * Copyright (c) 2020 MediaTek Inc.

 */



&pwrap {

	pmic: mt6358 {

		compatible = "mediatek,mt6358";

		interrupt-controller;

		interrupt-parent = <&pio>;

		interrupts = <182 IRQ_TYPE_LEVEL_HIGH>;

		#interrupt-cells = <2>;



		mt6358codec: mt6358codec {

			compatible = "mediatek,mt6358-sound";

		};



		mt6358regulator: mt6358regulator {

			mt6358_vdram1_reg: buck_vdram1 {

				regulator-name = "vdram1";

				regulator-min-microvolt = <500000>;

				regulator-max-microvolt = <2087500>;

				regulator-ramp-delay = <12500>;

				regulator-enable-ramp-delay = <0>;

				regulator-always-on;

				regulator-allowed-modes = <0 1>;

			};



			mt6358_vcore_reg: buck_vcore {

				regulator-name = "vcore";

				regulator-min-microvolt = <500000>;

				regulator-max-microvolt = <1293750>;

				regulator-ramp-delay = <6250>;

				regulator-enable-ramp-delay = <200>;

				regulator-always-on;

				regulator-allowed-modes = <0 1>;

			};



			mt6358_vpa_reg: buck_vpa {

				regulator-name = "vpa";

				regulator-min-microvolt = <500000>;

				regulator-max-microvolt = <3650000>;

				regulator-ramp-delay = <50000>;

				regulator-enable-ramp-delay = <250>;

				regulator-allowed-modes = <0 1>;

			};



			mt6358_vproc11_reg: buck_vproc11 {

				regulator-name = "vproc11";

				regulator-min-microvolt = <500000>;

				regulator-max-microvolt = <1293750>;

				regulator-ramp-delay = <6250>;

				regulator-enable-ramp-delay = <200>;

				regulator-always-on;

				regulator-allowed-modes = <0 1>;

			};



			mt6358_vproc12_reg: buck_vproc12 {

				regulator-name = "vproc12";

				regulator-min-microvolt = <500000>;

				regulator-max-microvolt = <1293750>;

				regulator-ramp-delay = <6250>;

				regulator-enable-ramp-delay = <200>;

				regulator-always-on;

				regulator-allowed-modes = <0 1>;

			};



			mt6358_vgpu_reg: buck_vgpu {

				regulator-name = "vgpu";

				regulator-min-microvolt = <500000>;

				regulator-max-microvolt = <1293750>;

				regulator-ramp-delay = <6250>;

				regulator-enable-ramp-delay = <200>;

				regulator-allowed-modes = <0 1>;

			};



			mt6358_vs2_reg: buck_vs2 {

				regulator-name = "vs2";

				regulator-min-microvolt = <500000>;

				regulator-max-microvolt = <2087500>;

				regulator-ramp-delay = <12500>;

				regulator-enable-ramp-delay = <0>;

				regulator-always-on;

			};



			mt6358_vmodem_reg: buck_vmodem {

				regulator-name = "vmodem";

				regulator-min-microvolt = <500000>;

				regulator-max-microvolt = <1293750>;

				regulator-ramp-delay = <6250>;

				regulator-enable-ramp-delay = <900>;

				regulator-always-on;

				regulator-allowed-modes = <0 1>;

			};



			mt6358_vs1_reg: buck_vs1 {

				regulator-name = "vs1";

				regulator-min-microvolt = <1000000>;

				regulator-max-microvolt = <2587500>;

				regulator-ramp-delay = <12500>;

				regulator-enable-ramp-delay = <0>;

				regulator-always-on;

			};



			mt6358_vdram2_reg: ldo_vdram2 {

				regulator-name = "vdram2";

				regulator-min-microvolt = <600000>;

				regulator-max-microvolt = <1800000>;

				regulator-enable-ramp-delay = <3300>;

			};



			mt6358_vsim1_reg: ldo_vsim1 {

				regulator-name = "vsim1";

				regulator-min-microvolt = <1700000>;

				regulator-max-microvolt = <3100000>;

				regulator-enable-ramp-delay = <540>;

			};



			mt6358_vibr_reg: ldo_vibr {

				regulator-name = "vibr";

				regulator-min-microvolt = <1200000>;

				regulator-max-microvolt = <3300000>;

				regulator-enable-ramp-delay = <60>;

			};



			mt6358_vrf12_reg: ldo_vrf12 {

				compatible = "regulator-fixed";

				regulator-name = "vrf12";

				regulator-min-microvolt = <1200000>;

				regulator-max-microvolt = <1200000>;

				regulator-enable-ramp-delay = <120>;

			};



			mt6358_vio18_reg: ldo_vio18 {

				compatible = "regulator-fixed";

				regulator-name = "vio18";

				regulator-min-microvolt = <1800000>;

				regulator-max-microvolt = <1800000>;

				regulator-enable-ramp-delay = <2700>;

				regulator-always-on;

			};



			mt6358_vusb_reg: ldo_vusb {

				regulator-name = "vusb";

				regulator-min-microvolt = <3000000>;

				regulator-max-microvolt = <3100000>;

				regulator-enable-ramp-delay = <270>;

				regulator-always-on;

			};



			mt6358_vcamio_reg: ldo_vcamio {

				compatible = "regulator-fixed";

				regulator-name = "vcamio";

				regulator-min-microvolt = <1800000>;

				regulator-max-microvolt = <1800000>;

				regulator-enable-ramp-delay = <325>;

			};



			mt6358_vcamd_reg: ldo_vcamd {

				regulator-name = "vcamd";

				regulator-min-microvolt = <900000>;

				regulator-max-microvolt = <1800000>;

				regulator-enable-ramp-delay = <325>;

			};



			mt6358_vcn18_reg: ldo_vcn18 {

				compatible = "regulator-fixed";

				regulator-name = "vcn18";

				regulator-min-microvolt = <1800000>;

				regulator-max-microvolt = <1800000>;

				regulator-enable-ramp-delay = <270>;

			};



			mt6358_vfe28_reg: ldo_vfe28 {

				compatible = "regulator-fixed";

				regulator-name = "vfe28";

				regulator-min-microvolt = <2800000>;

				regulator-max-microvolt = <2800000>;

				regulator-enable-ramp-delay = <270>;

			};



			mt6358_vsram_proc11_reg: ldo_vsram_proc11 {

				regulator-name = "vsram_proc11";

				regulator-min-microvolt = <500000>;

				regulator-max-microvolt = <1293750>;

				regulator-ramp-delay = <6250>;

				regulator-enable-ramp-delay = <240>;

				regulator-always-on;

			};



			mt6358_vcn28_reg: ldo_vcn28 {

				compatible = "regulator-fixed";

				regulator-name = "vcn28";

				regulator-min-microvolt = <2800000>;

				regulator-max-microvolt = <2800000>;

				regulator-enable-ramp-delay = <270>;

			};



			mt6358_vsram_others_reg: ldo_vsram_others {

				regulator-name = "vsram_others";

				regulator-min-microvolt = <500000>;

				regulator-max-microvolt = <1293750>;

				regulator-ramp-delay = <6250>;

				regulator-enable-ramp-delay = <240>;

				regulator-always-on;

			};



			mt6358_vsram_gpu_reg: ldo_vsram_gpu {

				regulator-name = "vsram_gpu";

				regulator-min-microvolt = <500000>;

				regulator-max-microvolt = <1293750>;

				regulator-ramp-delay = <6250>;

				regulator-enable-ramp-delay = <240>;

			};



			mt6358_vxo22_reg: ldo_vxo22 {

				compatible = "regulator-fixed";

				regulator-name = "vxo22";

				regulator-min-microvolt = <2200000>;

				regulator-max-microvolt = <2200000>;

				regulator-enable-ramp-delay = <120>;

				regulator-always-on;

			};



			mt6358_vefuse_reg: ldo_vefuse {

				regulator-name = "vefuse";

				regulator-min-microvolt = <1700000>;

				regulator-max-microvolt = <1900000>;

				regulator-enable-ramp-delay = <270>;

			};



			mt6358_vaux18_reg: ldo_vaux18 {

				compatible = "regulator-fixed";

				regulator-name = "vaux18";

				regulator-min-microvolt = <1800000>;

				regulator-max-microvolt = <1800000>;

				regulator-enable-ramp-delay = <270>;

			};



			mt6358_vmch_reg: ldo_vmch {

				regulator-name = "vmch";

				regulator-min-microvolt = <2900000>;

				regulator-max-microvolt = <3300000>;

				regulator-enable-ramp-delay = <60>;

			};



			mt6358_vbif28_reg: ldo_vbif28 {

				compatible = "regulator-fixed";

				regulator-name = "vbif28";

				regulator-min-microvolt = <2800000>;

				regulator-max-microvolt = <2800000>;

				regulator-enable-ramp-delay = <270>;

			};



			mt6358_vsram_proc12_reg: ldo_vsram_proc12 {

				regulator-name = "vsram_proc12";

				regulator-min-microvolt = <500000>;

				regulator-max-microvolt = <1293750>;

				regulator-ramp-delay = <6250>;

				regulator-enable-ramp-delay = <240>;

				regulator-always-on;

			};



			mt6358_vcama1_reg: ldo_vcama1 {

				regulator-name = "vcama1";

				regulator-min-microvolt = <1800000>;

				regulator-max-microvolt = <3000000>;

				regulator-enable-ramp-delay = <325>;

			};



			mt6358_vemc_reg: ldo_vemc {

				regulator-name = "vemc";

				regulator-min-microvolt = <2900000>;

				regulator-max-microvolt = <3300000>;

				regulator-enable-ramp-delay = <60>;

			};



			mt6358_vio28_reg: ldo_vio28 {

				compatible = "regulator-fixed";

				regulator-name = "vio28";

				regulator-min-microvolt = <2800000>;

				regulator-max-microvolt = <2800000>;

				regulator-enable-ramp-delay = <270>;

			};



			mt6358_va12_reg: ldo_va12 {

				compatible = "regulator-fixed";

				regulator-name = "va12";

				regulator-min-microvolt = <1200000>;

				regulator-max-microvolt = <1200000>;

				regulator-enable-ramp-delay = <270>;

				regulator-always-on;

			};



			mt6358_vrf18_reg: ldo_vrf18 {

				compatible = "regulator-fixed";

				regulator-name = "vrf18";

				regulator-min-microvolt = <1800000>;

				regulator-max-microvolt = <1800000>;

				regulator-enable-ramp-delay = <120>;

			};



			mt6358_vcn33_bt_reg: ldo_vcn33_bt {

				regulator-name = "vcn33_bt";

				regulator-min-microvolt = <3300000>;

				regulator-max-microvolt = <3500000>;

				regulator-enable-ramp-delay = <270>;

			};



			mt6358_vcn33_wifi_reg: ldo_vcn33_wifi {

				regulator-name = "vcn33_wifi";

				regulator-min-microvolt = <3300000>;

				regulator-max-microvolt = <3500000>;

				regulator-enable-ramp-delay = <270>;

			};



			mt6358_vcama2_reg: ldo_vcama2 {

				regulator-name = "vcama2";

				regulator-min-microvolt = <1800000>;

				regulator-max-microvolt = <3000000>;

				regulator-enable-ramp-delay = <325>;

			};



			mt6358_vmc_reg: ldo_vmc {

				regulator-name = "vmc";

				regulator-min-microvolt = <1800000>;

				regulator-max-microvolt = <3300000>;

				regulator-enable-ramp-delay = <60>;

			};



			mt6358_vldo28_reg: ldo_vldo28 {

				regulator-name = "vldo28";

				regulator-min-microvolt = <2800000>;

				regulator-max-microvolt = <3000000>;

				regulator-enable-ramp-delay = <270>;

			};



			mt6358_vaud28_reg: ldo_vaud28 {

				compatible = "regulator-fixed";

				regulator-name = "vaud28";

				regulator-min-microvolt = <2800000>;

				regulator-max-microvolt = <2800000>;

				regulator-enable-ramp-delay = <270>;

			};



			mt6358_vsim2_reg: ldo_vsim2 {

				regulator-name = "vsim2";

				regulator-min-microvolt = <1700000>;

				regulator-max-microvolt = <3100000>;

				regulator-enable-ramp-delay = <540>;

			};

		};



		mt6358rtc: mt6358rtc {

			compatible = "mediatek,mt6358-rtc";

		};

	};

};

arch/arm64/boot/dts/mediatek/mt6797.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -446,7 +446,7 @@ 
		status = "disabled";

	};



	mmsys: mmsys_config@14000000 {

	mmsys: syscon@14000000 {

		compatible = "mediatek,mt6797-mmsys", "syscon";

		reg = <0 0x14000000 0 0x1000>;

		#clock-cells = <1>;

arch/arm64/boot/dts/mediatek/mt8173.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -922,7 +922,7 @@ 
			};

		};



		mmsys: clock-controller@14000000 {

		mmsys: syscon@14000000 {

			compatible = "mediatek,mt8173-mmsys", "syscon";

			reg = <0 0x14000000 0 0x1000>;

			power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;

CRA Git | Maintained and supported by SUSTech CRA and CCSE