Merge tag 'imx-dt64-5.8' of... (28ed0a0b) · Commits · 戴 / test

Merge tag 'imx-dt64-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt i.MX arm64 device tree changes: - New support of Beacon i.MX8m-Mini development kit. - Add secondary cpus supply on imx8mm-evk and imx8mn-ddr4-evk for completeness. - Add thermal zones for imx8mp and lx2160a, PMIC thermal zone for imx8qxp-mek board. - Update VDD_ARM 1.2GHz setpoint voltage for imx8mn. - Add SRC device interrupt for i.MX8 SoCs. - Use 0.9V for VDD_GPU on imx8mq-librem5-devkit, since there is no need to support overclocking to 1GHz. - Update imx8qxp SCU device to use MU channel with less interrupt triggering, one RX interrupt for a RX and one TX interrupt for a TX. - Specify DMA channels for LS1028A DSPI controllers. - Add QE and DS26522 device support for fsl-ls1043a-rdb board. - Misc random update and cleanup. * tag 'imx-dt64-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (25 commits) arm64: dts: Add ds26522 node to dts to ls1043ardb arm64: dts: add qe node to ls1043ardb arm64: dts: ls1028a: sl28: keep switch port names consistent arm64: dts: imx8mp: Add src node interrupts arm64: dts: imx8mq: Add src node interrupts arm64: dts: imx8m: assign clocks for A53 arm64: dts: freescale: sl28: enable LPUART1 arm64: dts: ls1043a-rdb: add compatible for board arm64: dts: imx8mp: add "fsl,imx6sx-fec" compatible string arm64: dts: imx8qxp-mek: Do not use underscore in node name arm64: dts: fsl: add fsl,extts-fifo property for fman ptp arm64: dts: imx8mn: Update VDD_ARM 1.2GHz setpoint voltage arm64: dts: lx2160a: add more thermal zone support arm64: dts: imx8qxp-mek: Add PMIC thermal zone support arm64: dts: imx8qxp-mek: Sort labels alphabetically arm64: dts: imx8mm: specify #sound-dai-cells for SAI nodes arm64: dts: imx8qxp: support scu mailbox channel arm64: dts: imx8mp: Add thermal zones support arm64: dts: ls1012a: Add QSPI node properties arm64: dts: imx: Add Beacon i.MX8m-Mini development kit ... Link: https://lore.kernel.org/r/20200523032516.11016-5-shawnguo@kernel.org Signed-off-by:

Arnd Bergmann <arnd@arndb.de>

arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts

+15 −0

Original line number	Diff line number	Diff line
		@@ -74,6 +74,21 @@
		};
		};

		&qspi {
		status = "okay";

		s25fs512s0: flash@0 {
		compatible = "jedec,spi-nor";
		#address-cells = <1>;
		#size-cells = <1>;
		spi-max-frequency = <50000000>;
		m25p,fast-read;
		reg = <0>;
		spi-rx-bus-width = <2>;
		spi-tx-bus-width = <2>;
		};
		};

		&sai2 {
		status = "okay";
		};

arch/arm64/boot/dts/freescale/fsl-ls1012a-frwy.dts

+15 −0

Original line number	Diff line number	Diff line
		@@ -23,3 +23,18 @@
		&i2c0 {
		status = "okay";
		};

		&qspi {
		status = "okay";

		w25q16dw0: flash@0 {
		compatible = "jedec,spi-nor";
		#address-cells = <1>;
		#size-cells = <1>;
		m25p,fast-read;
		spi-max-frequency = <50000000>;
		reg = <0>;
		spi-rx-bus-width = <2>;
		spi-tx-bus-width = <2>;
		};
		};

arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts

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Original line number	Diff line number	Diff line
		@@ -128,6 +128,21 @@
		};
		};

		&qspi {
		status = "okay";

		s25fs512s0: flash@0 {
		compatible = "jedec,spi-nor";
		#address-cells = <1>;
		#size-cells = <1>;
		spi-max-frequency = <50000000>;
		m25p,fast-read;
		reg = <0>;
		spi-rx-bus-width = <2>;
		spi-tx-bus-width = <2>;
		};
		};

		&sai2 {
		status = "okay";
		};

arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts

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Original line number	Diff line number	Diff line
		@@ -35,6 +35,21 @@
		status = "okay";
		};

		&qspi {
		status = "okay";

		s25fs512s0: flash@0 {
		compatible = "jedec,spi-nor";
		#address-cells = <1>;
		#size-cells = <1>;
		spi-max-frequency = <50000000>;
		m25p,fast-read;
		reg = <0>;
		spi-rx-bus-width = <2>;
		spi-tx-bus-width = <2>;
		};
		};

		&sata {
		status = "okay";
		};

arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi

+13 −0

Original line number	Diff line number	Diff line
		@@ -137,6 +137,19 @@
		#size-cells = <2>;
		ranges;

		qspi: spi@1550000 {
		compatible = "fsl,ls1021a-qspi";
		#address-cells = <1>;
		#size-cells = <0>;
		reg = <0x0 0x1550000 0x0 0x10000>,
		<0x0 0x40000000 0x0 0x10000000>;
		reg-names = "QuadSPI", "QuadSPI-memory";
		interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
		clock-names = "qspi_en", "qspi";
		clocks = <&clockgen 4 0>, <&clockgen 4 0>;
		status = "disabled";
		};

		esdhc0: esdhc@1560000 {
		compatible = "fsl,ls1012a-esdhc", "fsl,esdhc";
		reg = <0x0 0x1560000 0x0 0x10000>;

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