drivers/timer: New, tickless-capable RISC-V machine timer driver

Rewritten driver along the lines of all the other new drivers,
implementing the new timer API.  Structurally, the machine timer is an
up-counter with comparator, so it works broadly the same way HPET and
NRF do.  The quirk here is that it's a 64 bit counter, which needs a
little more care.

Unlike the other timer reworks, this driver has grown by a few lines
as it used to be very simple.  But in exchange, we get full tickless
support on the platform.

Fixes #10609 in the process (the 64 bit timer registers are unlatched
for sub-word transfers, so you have to use careful ordering).

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>