Commit d929b8a9 authored Jan 30, 2025 by Kalle Kietäväinen Committed by Benjamin Cabé Feb 04, 2025

Revert "arch: arm: cortex_m: Only trigger context switch if thread is preemptible"



This reverts commit 42036cdb.

Architecture specific code should not do preemption checking before context
switch. This is already handled by the scheduler, so duplicating it would
be redundant and error prone. These checks used to be necessary, but the
scheduler has been rewritten since then and the checks were removed in
3a0cb2d3 (kernel: Remove legacy preemption checking, 2018-05-23).

The check this reverts was also incorrect, as it didn't take scheduler
locking nor meta-IRQs into account.

Fixes #80574

Signed-off-by: Kalle Kietäväinen <kalle.kietavainen@silabs.com>

parent 026a2c54

arch/arm/core/cortex_m/exc_exit.c

+2 −7

Original line number	Diff line number	Diff line
		@@ -55,14 +55,9 @@ FUNC_ALIAS(z_arm_exc_exit, z_arm_int_exit, void);
		Z_GENERIC_SECTION(.text._HandlerModeExit) void z_arm_exc_exit(void)
		{
		#ifdef CONFIG_PREEMPT_ENABLED
		/* If thread is preemptible */
		if (_kernel.cpus->current->base.prio >= 0) {
		/* and cached thread is not current thread */
		if (_kernel.ready_q.cache != _kernel.cpus->current) {
		/* trigger a context switch */
		SCB->ICSR \|= SCB_ICSR_PENDSVSET_Msk;
		}
		}
		#endif /* CONFIG_PREEMPT_ENABLED */

		#ifdef CONFIG_STACK_SENTINEL

Admin message