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Commit 7044876b authored by Francois Ramu's avatar Francois Ramu Committed by Benjamin Cabé
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dts: arm: stm32f412 device has a clock 48MHz multiplexer



Add a clk48Mhz node to the stm32f412 serie.
This clock is sourced by PLL_Q (default) or PLLI2S_Q
That 48MHz clock is used by the USB /SDMMC/RNG peripherals.
The sdmmc/SDIO clock is sourced by this CK48 (default)
or by the SYSCLOCK.

Signed-off-by: default avatarFrancois Ramu <francois.ramu@st.com>
parent fcc5f9da
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