soc: npcx: setup custom MPU regions for npcx7

NPCX7 variants allocate code RAM either at 0x10070000 or 0x10090000.
The MPU requires addresses and region sizes to be aligned, so the
generic cortex_m/arm_mpu_regions.c results in an ineffective setup with
the addresses above.

This adds a custom mpu_regions setup for the npcx7, which covers both
available sizes, resulting in these two possible setups:

- 192kB devices

  Code ram: 0x10090000 to 0x100bffff
MPU region: 0x10080000 to 0x100bffff (256k)

- 320kB devices

    Code ram: 0x10070000 to 0x100bffff
MPU region 0: 0x10040000 to 0x1007ffff (256k)
MPU region 1: 0x10080000 to 0x100bffff (256k)

In both cases MPU data RAM setting is from 0x200c0000 to 0x200cffff,
matching the generic Cortex-m setup.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>