drivers/clock_control: stm32u5 add pll2, pll3 clk src/div definitions

This commit adds necessary definitions in stm32_clock_control.h
to enable pll2, and pll3 support by:
- reusing existing pll3 divider definitions introduced for h7 series.
- adding pll2 divider definitions, and including them for u5 only.
- introducing clock source definitions for pll2 and pll3
  contrary to h7 u5 can select the clock sources for the 3 plls
  individually.

Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>