include/drivers: stm32_clock_control: Avoid non defined PLL outputs

On some series (H7, U5), it is possible define clock configuration
with disabled PLL outputs.
In that case, it is legit that matching pll property is not available.
Define corresponding STM32_PLLX_Y_DIVISOR macros using DT_PROP_OR
to avoid build issues in case prop is not available.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>