Merge tag 'irqchip-4.21' of...

Required properties:

- compatible : should be "allwinner,sun4i-a10-ic"

- compatible : should be one of the following:

              "allwinner,sun4i-a10-ic"

              "allwinner,suniv-f1c100s-ic"

- reg : Specifies base physical address and size of the registers.

- interrupt-controller : Identifies the node as an interrupt controller

- #interrupt-cells : Specifies the number of cells needed to encode an

Main node required properties:

- compatible : should at least contain  "arm,gic-v3".

- compatible : should at least contain  "arm,gic-v3" or either

		"qcom,msm8996-gic-v3", "arm,gic-v3" for msm8996 SoCs

		to address SoC specific bugs/quirks

- interrupt-controller : Identifies the node as an interrupt controller

- #interrupt-cells : Specifies the number of cells needed to encode an

  interrupt source. Must be a single cell with a value of at least 3.

Freescale IRQSTEER Interrupt multiplexer

Required properties:

- compatible: should be:

	- "fsl,imx8m-irqsteer"

	- "fsl,imx-irqsteer"

- reg: Physical base address and size of registers.

- interrupts: Should contain the parent interrupt line used to multiplex the

  input interrupts.

- clocks: Should contain one clock for entry in clock-names

  see Documentation/devicetree/bindings/clock/clock-bindings.txt

- clock-names:

   - "ipg": main logic clock

- interrupt-controller: Identifies the node as an interrupt controller.

- #interrupt-cells: Specifies the number of cells needed to encode an

  interrupt source. The value must be 1.

- fsl,channel: The output channel that all input IRQs should be steered into.

- fsl,irq-groups: Number of IRQ groups managed by this controller instance.

  Each group manages 64 input interrupts.

Example:

	interrupt-controller@32e2d000 {

		compatible = "fsl,imx8m-irqsteer", "fsl,imx-irqsteer";

		reg = <0x32e2d000 0x1000>;

		interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&clk IMX8MQ_CLK_DISP_APB_ROOT>;

		clock-names = "ipg";

		fsl,channel = <0>;

		fsl,irq-groups = <1>;

		interrupt-controller;

		#interrupt-cells = <1>;

	};

RDA Micro RDA8810PL Interrupt Controller

The interrupt controller in RDA8810PL SoC is a custom interrupt controller

which supports up to 32 interrupts.

Required properties:

- compatible: Should be "rda,8810pl-intc".

- reg: Specifies base physical address of the registers set.

- interrupt-controller: Identifies the node as an interrupt controller.

- #interrupt-cells: Specifies the number of cells needed to encode an

  interrupt source. The value shall be 2.

The interrupt sources are as follows:

ID	Name

------------

0:	PULSE_DUMMY

1:	I2C

2:	NAND_NFSC

3:	SDMMC1

4:	SDMMC2

5:	SDMMC3

6:	SPI1

7:	SPI2

8:	SPI3

9:	UART1

10:	UART2

11:	UART3

12:	GPIO1

13:	GPIO2

14:	GPIO3

15:	KEYPAD

16:	TIMER

17:	TIMEROS

18:	COMREG0

19:	COMREG1

20:	USB

21:	DMC

22:	DMA

23:	CAMERA

24:	GOUDA

25:	GPU

26:	VPU_JPG

27:	VPU_HOST

28:	VOC

29:	AUIFC0

30:	AUIFC1

31:	L2CC

Example:

		apb@20800000 {

			compatible = "simple-bus";

			...

			intc: interrupt-controller@0 {

				compatible = "rda,8810pl-intc";

				reg = <0x0 0x1000>;

				interrupt-controller;

				#interrupt-cells = <2>;

			};

		};

  (only needed for exti controller with multiple exti under

  same parent interrupt: st,stm32-exti and st,stm32h7-exti)

Optional properties:

- hwlocks: reference to a phandle of a hardware spinlock provider node.

Example:

exti: interrupt-controller@40013c00 {