Commit c5f48c0a authored by Ingo Molnar's avatar Ingo Molnar
Browse files

genirq: Fix various typos in comments 



Go over the IRQ subsystem source code (including irqchip drivers) and
fix common typos in comments.

No change in functionality intended.

Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: linux-kernel@vger.kernel.org
parent 989a4222

drivers/irqchip/irq-dw-apb-ictl.c

+1 −1
Original line number Diff line number Diff line
@@ -105,7 +105,7 @@ static int __init dw_apb_ictl_init(struct device_node *np, 
	 * DW IP can be configured to allow 2-64 irqs. We can determine

	 * the number of irqs supported by writing into enable register

	 * and look for bits not set, as corresponding flip-flops will

	 * have been removed by sythesis tool.

	 * have been removed by synthesis tool.

	 */



	/* mask and enable all interrupts */

drivers/irqchip/irq-gic.c

+3 −3
Original line number Diff line number Diff line
@@ -604,8 +604,8 @@ void gic_dist_save(struct gic_chip_data *gic) 
/*

 * Restores the GIC distributor registers during resume or when coming out of

 * idle.  Must be called before enabling interrupts.  If a level interrupt

 * that occured while the GIC was suspended is still present, it will be

 * handled normally, but any edge interrupts that occured will not be seen by

 * that occurred while the GIC was suspended is still present, it will be

 * handled normally, but any edge interrupts that occurred will not be seen by

 * the GIC and need to be handled by the platform-specific wakeup source.

 */

void gic_dist_restore(struct gic_chip_data *gic)
@@ -899,7 +899,7 @@ void gic_migrate_target(unsigned int new_cpu_id) 
	gic_cpu_map[cpu] = 1 << new_cpu_id;



	/*

	 * Find all the peripheral interrupts targetting the current

	 * Find all the peripheral interrupts targeting the current

	 * CPU interface and migrate them to the new CPU interface.

	 * We skip DIST_TARGET 0 to 7 as they are read-only.

	 */

drivers/irqchip/irq-renesas-h8s.c

+1 −1
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0

/*

 * H8S interrupt contoller driver

 * H8S interrupt controller driver

 *

 * Copyright 2015 Yoshinori Sato <ysato@users.sourceforge.jp>

 */

drivers/irqchip/irq-s3c24xx.c

+1 −1
Original line number Diff line number Diff line
@@ -58,7 +58,7 @@ struct s3c_irq_data { 
};



/*

 * Sructure holding the controller data

 * Structure holding the controller data

 * @reg_pending		register holding pending irqs

 * @reg_intpnd		special register intpnd in main intc

 * @reg_mask		mask register

include/linux/irqchip.h

+2 −2
Original line number Diff line number Diff line
@@ -19,7 +19,7 @@ 
 * the association between their DT compatible string and their

 * initialization function.

 *

 * @name: name that must be unique accross all IRQCHIP_DECLARE of the

 * @name: name that must be unique across all IRQCHIP_DECLARE of the

 * same file.

 * @compstr: compatible string of the irqchip driver

 * @fn: initialization function
@@ -30,7 +30,7 @@ 
 * This macro must be used by the different irqchip drivers to declare

 * the association between their version and their initialization function.

 *

 * @name: name that must be unique accross all IRQCHIP_ACPI_DECLARE of the

 * @name: name that must be unique across all IRQCHIP_ACPI_DECLARE of the

 * same file.

 * @subtable: Subtable to be identified in MADT

 * @validate: Function to be called on that subtable to check its validity.

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