Commit ff15e5a0 authored by José Roberto de Souza's avatar José Roberto de Souza
Browse files

drm/i915/display/mst: Enable virtual channel payload allocation earlier 



This register was being enabled after enable TRANS_DDI_FUNC_CTL and
PIPECONF/TRANS_CONF while BSpec states that it should be set when
enabling TRANS_DDI_FUNC_CTL.

BSpec: 49190
BSpec: 22243
Reviewed-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: default avatarJosé Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191107214559.77087-3-jose.souza@intel.com
parent 4d89adc7

drivers/gpu/drm/i915/display/intel_ddi.c

+2 −16
Original line number Diff line number Diff line
@@ -1802,22 +1802,6 @@ void intel_ddi_set_dp_msa(const struct intel_crtc_state *crtc_state, 
	I915_WRITE(TRANS_MSA_MISC(cpu_transcoder), temp);

}



void intel_ddi_set_vc_payload_alloc(const struct intel_crtc_state *crtc_state,

				    bool state)

{

	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);

	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;

	u32 temp;



	temp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder));

	if (state == true)

		temp |= TRANS_DDI_DP_VC_PAYLOAD_ALLOC;

	else

		temp &= ~TRANS_DDI_DP_VC_PAYLOAD_ALLOC;

	I915_WRITE(TRANS_DDI_FUNC_CTL(cpu_transcoder), temp);

}



/*

 * Returns the TRANS_DDI_FUNC_CTL value based on CRTC state.

 *
@@ -1923,6 +1907,8 @@ void intel_ddi_enable_transcoder_func(const struct intel_crtc_state *crtc_state) 
	u32 temp;



	temp = intel_ddi_transcoder_func_reg_val_get(crtc_state);

	if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST))

		temp |= TRANS_DDI_DP_VC_PAYLOAD_ALLOC;

	I915_WRITE(TRANS_DDI_FUNC_CTL(cpu_transcoder), temp);

}

drivers/gpu/drm/i915/display/intel_display.c

+0 −6
Original line number Diff line number Diff line
@@ -6673,9 +6673,6 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config, 
	if (pipe_config->has_pch_encoder)

		lpt_pch_enable(state, pipe_config);



	if (intel_crtc_has_type(pipe_config, INTEL_OUTPUT_DP_MST))

		intel_ddi_set_vc_payload_alloc(pipe_config, true);



	assert_vblank_disabled(crtc);

	intel_crtc_vblank_on(pipe_config);
@@ -6786,9 +6783,6 @@ static void haswell_crtc_disable(struct intel_crtc_state *old_crtc_state, 
	if (!transcoder_is_dsi(cpu_transcoder))

		intel_disable_pipe(old_crtc_state);



	if (intel_crtc_has_type(old_crtc_state, INTEL_OUTPUT_DP_MST))

		intel_ddi_set_vc_payload_alloc(old_crtc_state, false);



	if (INTEL_GEN(dev_priv) >= 11)

		icl_disable_transcoder_port_sync(old_crtc_state);

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