Commit fe4709a8 authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: Extract intel_modeset_calc_cdclk() 



Exfiltrate the cdclk code from intel_modeset_checks() into
intel_modeset_calc_cdclk().

Reviewed-by: default avatarMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190913193157.9556-4-ville.syrjala@linux.intel.com
parent 76c36a43

drivers/gpu/drm/i915/display/intel_cdclk.c

+130 −5
Original line number Diff line number Diff line
@@ -21,6 +21,7 @@ 
 * DEALINGS IN THE SOFTWARE.

 */



#include "intel_atomic.h"

#include "intel_cdclk.h"

#include "intel_display_types.h"

#include "intel_sideband.h"
@@ -1772,7 +1773,7 @@ bool intel_cdclk_needs_modeset(const struct intel_cdclk_state *a, 
 * Returns:

 * True if the CDCLK states require just a cd2x divider update, false if not.

 */

bool intel_cdclk_needs_cd2x_update(struct drm_i915_private *dev_priv,

static bool intel_cdclk_needs_cd2x_update(struct drm_i915_private *dev_priv,

					  const struct intel_cdclk_state *a,

					  const struct intel_cdclk_state *b)

{
@@ -1793,7 +1794,7 @@ bool intel_cdclk_needs_cd2x_update(struct drm_i915_private *dev_priv, 
 * Returns:

 * True if the CDCLK states don't match, false if they do.

 */

bool intel_cdclk_changed(const struct intel_cdclk_state *a,

static bool intel_cdclk_changed(const struct intel_cdclk_state *a,

				const struct intel_cdclk_state *b)

{

	return intel_cdclk_needs_modeset(a, b) ||
@@ -2220,6 +2221,130 @@ static int bxt_modeset_calc_cdclk(struct intel_atomic_state *state) 
	return 0;

}



static int intel_lock_all_pipes(struct intel_atomic_state *state)

{

	struct drm_i915_private *dev_priv = to_i915(state->base.dev);

	struct intel_crtc *crtc;



	/* Add all pipes to the state */

	for_each_intel_crtc(&dev_priv->drm, crtc) {

		struct intel_crtc_state *crtc_state;



		crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);

		if (IS_ERR(crtc_state))

			return PTR_ERR(crtc_state);

	}



	return 0;

}



static int intel_modeset_all_pipes(struct intel_atomic_state *state)

{

	struct drm_i915_private *dev_priv = to_i915(state->base.dev);

	struct intel_crtc *crtc;



	/*

	 * Add all pipes to the state, and force

	 * a modeset on all the active ones.

	 */

	for_each_intel_crtc(&dev_priv->drm, crtc) {

		struct intel_crtc_state *crtc_state;

		int ret;



		crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);

		if (IS_ERR(crtc_state))

			return PTR_ERR(crtc_state);



		if (!crtc_state->base.active ||

		    drm_atomic_crtc_needs_modeset(&crtc_state->base))

			continue;



		crtc_state->base.mode_changed = true;



		ret = drm_atomic_add_affected_connectors(&state->base,

							 &crtc->base);

		if (ret)

			return ret;



		ret = drm_atomic_add_affected_planes(&state->base,

						     &crtc->base);

		if (ret)

			return ret;



		crtc_state->update_planes |= crtc_state->active_planes;

	}



	return 0;

}



int intel_modeset_calc_cdclk(struct intel_atomic_state *state)

{

	struct drm_i915_private *dev_priv = to_i915(state->base.dev);

	enum pipe pipe;

	int ret;



	if (!dev_priv->display.modeset_calc_cdclk)

		return 0;



	ret = dev_priv->display.modeset_calc_cdclk(state);

	if (ret)

		return ret;



	/*

	 * Writes to dev_priv->cdclk.logical must protected by

	 * holding all the crtc locks, even if we don't end up

	 * touching the hardware

	 */

	if (intel_cdclk_changed(&dev_priv->cdclk.logical,

				&state->cdclk.logical)) {

		ret = intel_lock_all_pipes(state);

		if (ret < 0)

			return ret;

	}



	if (is_power_of_2(state->active_pipes)) {

		struct intel_crtc *crtc;

		struct intel_crtc_state *crtc_state;



		pipe = ilog2(state->active_pipes);

		crtc = intel_get_crtc_for_pipe(dev_priv, pipe);

		crtc_state = intel_atomic_get_new_crtc_state(state, crtc);

		if (crtc_state &&

		    drm_atomic_crtc_needs_modeset(&crtc_state->base))

			pipe = INVALID_PIPE;

	} else {

		pipe = INVALID_PIPE;

	}



	/* All pipes must be switched off while we change the cdclk. */

	if (pipe != INVALID_PIPE &&

	    intel_cdclk_needs_cd2x_update(dev_priv,

					  &dev_priv->cdclk.actual,

					  &state->cdclk.actual)) {

		ret = intel_lock_all_pipes(state);

		if (ret)

			return ret;



		state->cdclk.pipe = pipe;

	} else if (intel_cdclk_needs_modeset(&dev_priv->cdclk.actual,

					     &state->cdclk.actual)) {

		ret = intel_modeset_all_pipes(state);

		if (ret)

			return ret;



		state->cdclk.pipe = INVALID_PIPE;

	}



	DRM_DEBUG_KMS("New cdclk calculated to be logical %u kHz, actual %u kHz\n",

		      state->cdclk.logical.cdclk,

		      state->cdclk.actual.cdclk);

	DRM_DEBUG_KMS("New voltage level calculated to be logical %u, actual %u\n",

		      state->cdclk.logical.voltage_level,

		      state->cdclk.actual.voltage_level);



	return 0;

}



static int intel_compute_max_dotclk(struct drm_i915_private *dev_priv)

{

	int max_cdclk_freq = dev_priv->max_cdclk_freq;

drivers/gpu/drm/i915/display/intel_cdclk.h

+1 −5
Original line number Diff line number Diff line
@@ -29,13 +29,8 @@ void intel_init_cdclk_hooks(struct drm_i915_private *dev_priv); 
void intel_update_max_cdclk(struct drm_i915_private *dev_priv);

void intel_update_cdclk(struct drm_i915_private *dev_priv);

void intel_update_rawclk(struct drm_i915_private *dev_priv);

bool intel_cdclk_needs_cd2x_update(struct drm_i915_private *dev_priv,

				   const struct intel_cdclk_state *a,

				   const struct intel_cdclk_state *b);

bool intel_cdclk_needs_modeset(const struct intel_cdclk_state *a,

			       const struct intel_cdclk_state *b);

bool intel_cdclk_changed(const struct intel_cdclk_state *a,

			 const struct intel_cdclk_state *b);

void intel_cdclk_swap_state(struct intel_atomic_state *state);

void

intel_set_cdclk_pre_plane_update(struct drm_i915_private *dev_priv,
@@ -49,5 +44,6 @@ intel_set_cdclk_post_plane_update(struct drm_i915_private *dev_priv, 
				  enum pipe pipe);

void intel_dump_cdclk_state(const struct intel_cdclk_state *cdclk_state,

			    const char *context);

int intel_modeset_calc_cdclk(struct intel_atomic_state *state);



#endif /* __INTEL_CDCLK_H__ */

drivers/gpu/drm/i915/display/intel_display.c

+4 −119
Original line number Diff line number Diff line
@@ -13433,65 +13433,12 @@ static int haswell_mode_set_planes_workaround(struct intel_atomic_state *state) 
	return 0;

}



static int intel_lock_all_pipes(struct intel_atomic_state *state)

{

	struct drm_i915_private *dev_priv = to_i915(state->base.dev);

	struct intel_crtc *crtc;



	/* Add all pipes to the state */

	for_each_intel_crtc(&dev_priv->drm, crtc) {

		struct intel_crtc_state *crtc_state;



		crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);

		if (IS_ERR(crtc_state))

			return PTR_ERR(crtc_state);

	}



	return 0;

}



static int intel_modeset_all_pipes(struct intel_atomic_state *state)

{

	struct drm_i915_private *dev_priv = to_i915(state->base.dev);

	struct intel_crtc *crtc;



	/*

	 * Add all pipes to the state, and force

	 * a modeset on all the active ones.

	 */

	for_each_intel_crtc(&dev_priv->drm, crtc) {

		struct intel_crtc_state *crtc_state;

		int ret;



		crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);

		if (IS_ERR(crtc_state))

			return PTR_ERR(crtc_state);



		if (!crtc_state->base.active || needs_modeset(crtc_state))

			continue;



		crtc_state->base.mode_changed = true;



		ret = drm_atomic_add_affected_connectors(&state->base,

							 &crtc->base);

		if (ret)

			return ret;



		ret = drm_atomic_add_affected_planes(&state->base,

						     &crtc->base);

		if (ret)

			return ret;

	}



	return 0;

}



static int intel_modeset_checks(struct intel_atomic_state *state)

{

	struct drm_i915_private *dev_priv = to_i915(state->base.dev);

	struct intel_crtc_state *old_crtc_state, *new_crtc_state;

	struct intel_crtc *crtc;

	int ret = 0, i;

	int ret, i;



	if (!check_digital_port_conflicts(state)) {

		DRM_DEBUG_KMS("rejecting conflicting digital port configuration\n");
@@ -13519,72 +13466,10 @@ static int intel_modeset_checks(struct intel_atomic_state *state) 
			state->active_pipe_changes |= BIT(crtc->pipe);

	}



	/*

	 * See if the config requires any additional preparation, e.g.

	 * to adjust global state with pipes off.  We need to do this

	 * here so we can get the modeset_pipe updated config for the new

	 * mode set on this crtc.  For other crtcs we need to use the

	 * adjusted_mode bits in the crtc directly.

	 */

	if (dev_priv->display.modeset_calc_cdclk) {

		enum pipe pipe;



		ret = dev_priv->display.modeset_calc_cdclk(state);

		if (ret < 0)

			return ret;



		/*

		 * Writes to dev_priv->cdclk.logical must protected by

		 * holding all the crtc locks, even if we don't end up

		 * touching the hardware

		 */

		if (intel_cdclk_changed(&dev_priv->cdclk.logical,

					&state->cdclk.logical)) {

			ret = intel_lock_all_pipes(state);

			if (ret < 0)

				return ret;

		}



		if (is_power_of_2(state->active_pipes)) {

			struct intel_crtc *crtc;

			struct intel_crtc_state *crtc_state;



			pipe = ilog2(state->active_pipes);

			crtc = intel_get_crtc_for_pipe(dev_priv, pipe);

			crtc_state = intel_atomic_get_new_crtc_state(state, crtc);

			if (crtc_state && needs_modeset(crtc_state))

				pipe = INVALID_PIPE;

		} else {

			pipe = INVALID_PIPE;

		}



		/* All pipes must be switched off while we change the cdclk. */

		if (pipe != INVALID_PIPE &&

		    intel_cdclk_needs_cd2x_update(dev_priv,

						  &dev_priv->cdclk.actual,

						  &state->cdclk.actual)) {

			ret = intel_lock_all_pipes(state);

			if (ret < 0)

				return ret;



			state->cdclk.pipe = pipe;

		} else if (intel_cdclk_needs_modeset(&dev_priv->cdclk.actual,

						     &state->cdclk.actual)) {

			ret = intel_modeset_all_pipes(state);

			if (ret < 0)

	ret = intel_modeset_calc_cdclk(state);

	if (ret)

		return ret;



			state->cdclk.pipe = INVALID_PIPE;

		}



		DRM_DEBUG_KMS("New cdclk calculated to be logical %u kHz, actual %u kHz\n",

			      state->cdclk.logical.cdclk,

			      state->cdclk.actual.cdclk);

		DRM_DEBUG_KMS("New voltage level calculated to be logical %u, actual %u\n",

			      state->cdclk.logical.voltage_level,

			      state->cdclk.actual.voltage_level);

	}



	intel_modeset_clear_plls(state);



	if (IS_HASWELL(dev_priv))

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