drm/i915: Allow downscale factor of <3.0 on glk+ for all formats (76c36a43) · Commits · 戴 / test

Bspec says that glk+ max downscale factor is <3.0 for all pixel formats. Older platforms had a max of <2.0 for NV12. Update the code to deal with this. Reviewed-by:

Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Signed-off-by:

Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190913193157.9556-3-ville.syrjala@linux.intel.com

drivers/gpu/drm/i915/display/intel_display.c

+6 −3

Original line number	Diff line number	Diff line
		@@ -14556,7 +14556,7 @@ skl_max_scale(const struct intel_crtc_state *crtc_state,
		{
		struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
		struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
		int max_scale, mult;
		int max_scale;
		int crtc_clock, max_dotclk, tmpclk1, tmpclk2;

		if (!crtc_state->base.enable)
		@@ -14577,8 +14577,11 @@ skl_max_scale(const struct intel_crtc_state *crtc_state,
		* or
		* cdclk/crtc_clock
		*/
		mult = drm_format_info_is_yuv_semiplanar(format) ? 2 : 3;
		tmpclk1 = (1 << 16) * mult - 1;
		if (INTEL_GEN(dev_priv) >= 10 \|\| IS_GEMINILAKE(dev_priv) \|\|
		!drm_format_info_is_yuv_semiplanar(format))
		tmpclk1 = 0x30000 - 1;
		else
		tmpclk1 = 0x20000 - 1;
		tmpclk2 = (1 << 8) * ((max_dotclk << 8) / crtc_clock);
		max_scale = min(tmpclk1, tmpclk2);

Admin message