Commit d1d23d7f authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: Replace is_planar_yuv_format() with drm_format_info_is_yuv_semiplanar() 



There's a helper in drm_fourcc.h these days to check of we're dealing
with a two plane YUV format. Make use if it.

Also s/plane/color_plane/ in skl_plane_relative_data_rate() to reduce
the confusion.

Reviewed-by: default avatarMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190913193157.9556-2-ville.syrjala@linux.intel.com
parent a2b69ea4

drivers/gpu/drm/i915/display/intel_atomic_plane.c

+3 −2
Original line number Diff line number Diff line
@@ -144,6 +144,7 @@ int intel_plane_atomic_check_with_state(const struct intel_crtc_state *old_crtc_ 
					struct intel_plane_state *new_plane_state)

{

	struct intel_plane *plane = to_intel_plane(new_plane_state->base.plane);

	const struct drm_framebuffer *fb = new_plane_state->base.fb;

	int ret;



	new_crtc_state->active_planes &= ~BIT(plane->id);
@@ -164,11 +165,11 @@ int intel_plane_atomic_check_with_state(const struct intel_crtc_state *old_crtc_ 
		new_crtc_state->active_planes |= BIT(plane->id);



	if (new_plane_state->base.visible &&

	    is_planar_yuv_format(new_plane_state->base.fb->format->format))

	    drm_format_info_is_yuv_semiplanar(fb->format))

		new_crtc_state->nv12_planes |= BIT(plane->id);



	if (new_plane_state->base.visible &&

	    new_plane_state->base.fb->format->format == DRM_FORMAT_C8)

	    fb->format->format == DRM_FORMAT_C8)

		new_crtc_state->c8_planes |= BIT(plane->id);



	if (new_plane_state->base.visible || old_plane_state->base.visible)

drivers/gpu/drm/i915/display/intel_display.c

+5 −5
Original line number Diff line number Diff line
@@ -3545,7 +3545,7 @@ int skl_check_plane_surface(struct intel_plane_state *plane_state) 
	 * Handle the AUX surface first since

	 * the main surface setup depends on it.

	 */

	if (is_planar_yuv_format(fb->format->format)) {

	if (drm_format_info_is_yuv_semiplanar(fb->format)) {

		ret = skl_check_nv12_aux_surface(plane_state);

		if (ret)

			return ret;
@@ -5463,7 +5463,7 @@ skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach, 
		return 0;

	}



	if (format && is_planar_yuv_format(format->format) &&

	if (format && drm_format_info_is_yuv_semiplanar(format) &&

	    (src_h < SKL_MIN_YUV_420_SRC_H || src_w < SKL_MIN_YUV_420_SRC_W)) {

		DRM_DEBUG_KMS("Planar YUV: src dimensions not met\n");

		return -EINVAL;
@@ -5540,7 +5540,7 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state, 


	/* Pre-gen11 and SDR planes always need a scaler for planar formats. */

	if (!icl_is_hdr_plane(dev_priv, intel_plane->id) &&

	    fb && is_planar_yuv_format(fb->format->format))

	    fb && drm_format_info_is_yuv_semiplanar(fb->format))

		need_scaler = true;



	ret = skl_update_scaler(crtc_state, force_detach,
@@ -14552,7 +14552,7 @@ intel_cleanup_plane_fb(struct drm_plane *plane, 


int

skl_max_scale(const struct intel_crtc_state *crtc_state,

	      u32 pixel_format)

	      const struct drm_format_info *format)

{

	struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
@@ -14577,7 +14577,7 @@ skl_max_scale(const struct intel_crtc_state *crtc_state, 
	 *            or

	 *    cdclk/crtc_clock

	 */

	mult = is_planar_yuv_format(pixel_format) ? 2 : 3;

	mult = drm_format_info_is_yuv_semiplanar(format) ? 2 : 3;

	tmpclk1 = (1 << 16) * mult - 1;

	tmpclk2 = (1 << 8) * ((max_dotclk << 8) / crtc_clock);

	max_scale = min(tmpclk1, tmpclk2);

drivers/gpu/drm/i915/display/intel_display.h

+2 −1
Original line number Diff line number Diff line
@@ -34,6 +34,7 @@ struct drm_connector; 
struct drm_device;

struct drm_encoder;

struct drm_file;

struct drm_format_info;

struct drm_framebuffer;

struct drm_i915_error_state_buf;

struct drm_i915_gem_object;
@@ -548,7 +549,7 @@ void intel_crtc_arm_fifo_underrun(struct intel_crtc *crtc, 
u16 skl_scaler_calc_phase(int sub, int scale, bool chroma_center);

int skl_update_scaler_crtc(struct intel_crtc_state *crtc_state);

int skl_max_scale(const struct intel_crtc_state *crtc_state,

		  u32 pixel_format);

		  const struct drm_format_info *format);

u32 glk_plane_color_ctl(const struct intel_crtc_state *crtc_state,

			const struct intel_plane_state *plane_state);

u32 glk_plane_color_ctl_crtc(const struct intel_crtc_state *crtc_state);

drivers/gpu/drm/i915/display/intel_sprite.c

+4 −16
Original line number Diff line number Diff line
@@ -48,19 +48,6 @@ 
#include "intel_psr.h"

#include "intel_sprite.h"



bool is_planar_yuv_format(u32 pixelformat)

{

	switch (pixelformat) {

	case DRM_FORMAT_NV12:

	case DRM_FORMAT_P010:

	case DRM_FORMAT_P012:

	case DRM_FORMAT_P016:

		return true;

	default:

		return false;

	}

}



int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode,

			     int usecs)

{
@@ -361,6 +348,7 @@ skl_program_scaler(struct intel_plane *plane, 
		   const struct intel_plane_state *plane_state)

{

	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);

	const struct drm_framebuffer *fb = plane_state->base.fb;

	enum pipe pipe = plane->pipe;

	int scaler_id = plane_state->scaler_id;

	const struct intel_scaler *scaler =
@@ -381,7 +369,7 @@ skl_program_scaler(struct intel_plane *plane, 
				      0, INT_MAX);



	/* TODO: handle sub-pixel coordinates */

	if (is_planar_yuv_format(plane_state->base.fb->format->format) &&

	if (drm_format_info_is_yuv_semiplanar(fb->format) &&

	    !icl_is_hdr_plane(dev_priv, plane->id)) {

		y_hphase = skl_scaler_calc_phase(1, hscale, false);

		y_vphase = skl_scaler_calc_phase(1, vscale, false);
@@ -1790,7 +1778,7 @@ static int skl_plane_check_nv12_rotation(const struct intel_plane_state *plane_s 
	int src_w = drm_rect_width(&plane_state->base.src) >> 16;



	/* Display WA #1106 */

	if (is_planar_yuv_format(fb->format->format) && src_w & 3 &&

	if (drm_format_info_is_yuv_semiplanar(fb->format) && src_w & 3 &&

	    (rotation == DRM_MODE_ROTATE_270 ||

	     rotation == (DRM_MODE_REFLECT_X | DRM_MODE_ROTATE_90))) {

		DRM_DEBUG_KMS("src width must be multiple of 4 for rotated planar YUV\n");
@@ -1817,7 +1805,7 @@ static int skl_plane_check(struct intel_crtc_state *crtc_state, 
	/* use scaler when colorkey is not required */

	if (!plane_state->ckey.flags && intel_fb_scalable(fb)) {

		min_scale = 1;

		max_scale = skl_max_scale(crtc_state, fb->format->format);

		max_scale = skl_max_scale(crtc_state, fb->format);

	}



	ret = drm_atomic_helper_check_plane_state(&plane_state->base,

drivers/gpu/drm/i915/display/intel_sprite.h

+0 −1
Original line number Diff line number Diff line
@@ -17,7 +17,6 @@ struct drm_i915_private; 
struct intel_crtc_state;

struct intel_plane_state;



bool is_planar_yuv_format(u32 pixelformat);

int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode,

			     int usecs);

struct intel_plane *intel_sprite_plane_create(struct drm_i915_private *dev_priv,

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