Commit fdec207e authored by WANG Xuerui's avatar WANG Xuerui Committed by Thomas Bogendoerfer
Browse files

MIPS: Loongson64: define offsets and known revisions for some CPUCFG features 



Add the constants for easier and maintainable composition of CPUCFG
values.

Signed-off-by: default avatarWANG Xuerui <git@xen0n.name>
Cc: Huacai Chen <chenhc@lemote.com>
Cc: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: default avatarThomas Bogendoerfer <tsbogend@alpha.franken.de>
parent de541d60

arch/mips/include/asm/mach-loongson64/loongson_regs.h

+19 −0
Original line number Diff line number Diff line
@@ -67,6 +67,8 @@ static inline u32 read_cpucfg(u32 reg) 
#define LOONGSON_CFG1_SFBP	BIT(29)

#define LOONGSON_CFG1_CDMAP	BIT(30)



#define LOONGSON_CFG1_FPREV_OFFSET	1



#define LOONGSON_CFG2 0x2

#define LOONGSON_CFG2_LEXT1	BIT(0)

#define LOONGSON_CFG2_LEXT2	BIT(1)
@@ -90,6 +92,13 @@ static inline u32 read_cpucfg(u32 reg) 
#define LOONGSON_CFG2_LCSRP	BIT(27)

#define LOONGSON_CFG2_LDISBLIKELY	BIT(28)



#define LOONGSON_CFG2_LPMREV_OFFSET	9

#define LOONGSON_CFG2_LPM_REV1		(1 << LOONGSON_CFG2_LPMREV_OFFSET)

#define LOONGSON_CFG2_LPM_REV2		(2 << LOONGSON_CFG2_LPMREV_OFFSET)

#define LOONGSON_CFG2_LVZREV_OFFSET	16

#define LOONGSON_CFG2_LVZ_REV1		(1 << LOONGSON_CFG2_LVZREV_OFFSET)

#define LOONGSON_CFG2_LVZ_REV2		(2 << LOONGSON_CFG2_LVZREV_OFFSET)



#define LOONGSON_CFG3 0x3

#define LOONGSON_CFG3_LCAMP	BIT(0)

#define LOONGSON_CFG3_LCAMREV	GENMASK(3, 1)
@@ -97,6 +106,16 @@ static inline u32 read_cpucfg(u32 reg) 
#define LOONGSON_CFG3_LCAMKW	GENMASK(19, 12)

#define LOONGSON_CFG3_LCAMVW	GENMASK(27, 20)



#define LOONGSON_CFG3_LCAMREV_OFFSET	1

#define LOONGSON_CFG3_LCAM_REV1		(1 << LOONGSON_CFG3_LCAMREV_OFFSET)

#define LOONGSON_CFG3_LCAM_REV2		(2 << LOONGSON_CFG3_LCAMREV_OFFSET)

#define LOONGSON_CFG3_LCAMNUM_OFFSET	4

#define LOONGSON_CFG3_LCAMNUM_REV1	(0x3f << LOONGSON_CFG3_LCAMNUM_OFFSET)

#define LOONGSON_CFG3_LCAMKW_OFFSET	12

#define LOONGSON_CFG3_LCAMKW_REV1	(0x27 << LOONGSON_CFG3_LCAMKW_OFFSET)

#define LOONGSON_CFG3_LCAMVW_OFFSET	20

#define LOONGSON_CFG3_LCAMVW_REV1	(0x3f << LOONGSON_CFG3_LCAMVW_OFFSET)



#define LOONGSON_CFG4 0x4

#define LOONGSON_CFG4_CCFREQ	GENMASK(31, 0)

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