Commit fc47e672 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge master.kernel.org:/home/rmk/linux-2.6-arm 

* master.kernel.org:/home/rmk/linux-2.6-arm:
  ARM: 6535/1: V6 MPCore v6_dma_inv_range and v6_dma_flush_range RWFO fix
  ARM: 6534/1: Make CONFIG_FPE_NWFPE depend on !CONFIG_THUMB2_KERNEL
  ARM: 6533/1: Thumb-2: Make CONFIG_THUMB2_KERNEL depend on !CPU_V6
  Change bcmring Maintainer list.
  ARM: Update mach-types
  ARM: 6528/1: Use CTR for the I-cache line size on ARMv7
  ARM: 6527/1: Use CTR instead of CCSIDR for the D-cache line size on ARMv7
  ARM: pxa/palm: fix ifdef around gen_nand driver registration
  ARM: pxa: fix pxa2xx-flash section mismatch
  ARM: mmp2: remove not used clk_rtc
parents 478b2a34 85b093bc

MAINTAINERS

+2 −2
Original line number Diff line number Diff line
@@ -559,14 +559,14 @@ W: http://maxim.org.za/at91_26.html 
S:	Maintained



ARM/BCMRING ARM ARCHITECTURE

M:	Leo Chen <leochen@broadcom.com>

M:	Jiandong Zheng <jdzheng@broadcom.com>

M:	Scott Branden <sbranden@broadcom.com>

L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)

S:	Maintained

F:	arch/arm/mach-bcmring



ARM/BCMRING MTD NAND DRIVER

M:	Leo Chen <leochen@broadcom.com>

M:	Jiandong Zheng <jdzheng@broadcom.com>

M:	Scott Branden <sbranden@broadcom.com>

L:	linux-mtd@lists.infradead.org

S:	Maintained

arch/arm/Kconfig

+2 −2
Original line number Diff line number Diff line
@@ -1311,7 +1311,7 @@ config HZ 


config THUMB2_KERNEL

	bool "Compile the kernel in Thumb-2 mode"

	depends on CPU_V7 && EXPERIMENTAL

	depends on CPU_V7 && !CPU_V6 && EXPERIMENTAL

	select AEABI

	select ARM_ASM_UNIFIED

	help
@@ -1759,7 +1759,7 @@ comment "At least one emulation must be selected" 


config FPE_NWFPE

	bool "NWFPE math emulation"

	depends on !AEABI || OABI_COMPAT

	depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL

	---help---

	  Say Y to include the NWFPE floating point emulator in the kernel.

	  This is necessary to run most binaries. Linux does not currently

arch/arm/mach-mmp/mmp2.c

+0 −1
Original line number Diff line number Diff line
@@ -126,7 +126,6 @@ static APBC_CLK(twsi3, MMP2_TWSI3, 0, 26000000); 
static APBC_CLK(twsi4, MMP2_TWSI4, 0, 26000000);

static APBC_CLK(twsi5, MMP2_TWSI5, 0, 26000000);

static APBC_CLK(twsi6, MMP2_TWSI6, 0, 26000000);

static APBC_CLK(rtc, MMP2_RTC, 0, 32768);



static APMU_CLK(nand, NAND, 0xbf, 100000000);

arch/arm/mach-pxa/palmtx.c

+2 −1
Original line number Diff line number Diff line
@@ -241,7 +241,8 @@ static inline void palmtx_keys_init(void) {} 
/******************************************************************************

 * NAND Flash

 ******************************************************************************/

#if defined(CONFIG_MTD_NAND_GPIO) || defined(CONFIG_MTD_NAND_GPIO_MODULE)

#if defined(CONFIG_MTD_NAND_PLATFORM) || \

	defined(CONFIG_MTD_NAND_PLATFORM_MODULE)

static void palmtx_nand_cmd_ctl(struct mtd_info *mtd, int cmd,

				 unsigned int ctrl)

{

arch/arm/mm/cache-v6.S

+20 −8
Original line number Diff line number Diff line
@@ -203,6 +203,10 @@ ENTRY(v6_flush_kern_dcache_area) 
 *	- end     - virtual end address of region

 */

v6_dma_inv_range:

#ifdef CONFIG_DMA_CACHE_RWFO

	ldrb	r2, [r0]			@ read for ownership

	strb	r2, [r0]			@ write for ownership

#endif

	tst	r0, #D_CACHE_LINE_SIZE - 1

	bic	r0, r0, #D_CACHE_LINE_SIZE - 1

#ifdef HARVARD_CACHE
@@ -211,6 +215,10 @@ v6_dma_inv_range: 
	mcrne	p15, 0, r0, c7, c11, 1		@ clean unified line

#endif

	tst	r1, #D_CACHE_LINE_SIZE - 1

#ifdef CONFIG_DMA_CACHE_RWFO

	ldrneb	r2, [r1, #-1]			@ read for ownership

	strneb	r2, [r1, #-1]			@ write for ownership

#endif

	bic	r1, r1, #D_CACHE_LINE_SIZE - 1

#ifdef HARVARD_CACHE

	mcrne	p15, 0, r1, c7, c14, 1		@ clean & invalidate D line
@@ -218,10 +226,6 @@ v6_dma_inv_range: 
	mcrne	p15, 0, r1, c7, c15, 1		@ clean & invalidate unified line

#endif

1:

#ifdef CONFIG_DMA_CACHE_RWFO

	ldr	r2, [r0]			@ read for ownership

	str	r2, [r0]			@ write for ownership

#endif

#ifdef HARVARD_CACHE

	mcr	p15, 0, r0, c7, c6, 1		@ invalidate D line

#else
@@ -229,6 +233,10 @@ v6_dma_inv_range: 
#endif

	add	r0, r0, #D_CACHE_LINE_SIZE

	cmp	r0, r1

#ifdef CONFIG_DMA_CACHE_RWFO

	ldrlo	r2, [r0]			@ read for ownership

	strlo	r2, [r0]			@ write for ownership

#endif

	blo	1b

	mov	r0, #0

	mcr	p15, 0, r0, c7, c10, 4		@ drain write buffer
@@ -263,12 +271,12 @@ v6_dma_clean_range: 
 *	- end     - virtual end address of region

 */

ENTRY(v6_dma_flush_range)

	bic	r0, r0, #D_CACHE_LINE_SIZE - 1

1:

#ifdef CONFIG_DMA_CACHE_RWFO

	ldr	r2, [r0]			@ read for ownership

	str	r2, [r0]			@ write for ownership

	ldrb	r2, [r0]		@ read for ownership

	strb	r2, [r0]		@ write for ownership

#endif

	bic	r0, r0, #D_CACHE_LINE_SIZE - 1

1:

#ifdef HARVARD_CACHE

	mcr	p15, 0, r0, c7, c14, 1		@ clean & invalidate D line

#else
@@ -276,6 +284,10 @@ ENTRY(v6_dma_flush_range) 
#endif

	add	r0, r0, #D_CACHE_LINE_SIZE

	cmp	r0, r1

#ifdef CONFIG_DMA_CACHE_RWFO

	ldrlob	r2, [r0]			@ read for ownership

	strlob	r2, [r0]			@ write for ownership

#endif

	blo	1b

	mov	r0, #0

	mcr	p15, 0, r0, c7, c10, 4		@ drain write buffer

CRA Git | Maintained and supported by SUSTech CRA and CCSE