Commit 85b093bc authored by Valentine Barshak's avatar Valentine Barshak Committed by Russell King
Browse files

ARM: 6535/1: V6 MPCore v6_dma_inv_range and v6_dma_flush_range RWFO fix 



Cache ownership must be acquired by reading/writing data from the
cache line to make cache operation have the desired effect on the
SMP MPCore CPU. However, the ownership is never acquired in the
v6_dma_inv_range function when cleaning the first line and
flushing the last one, in case the address is not aligned
to D_CACHE_LINE_SIZE boundary.
Fix this by reading/writing data if needed, before performing
cache operations.
While at it, fix v6_dma_flush_range to prevent RWFO outside
the buffer.

Cc: stable@kernel.org
Signed-off-by: default avatarValentine Barshak <vbarshak@mvista.com>
Signed-off-by: default avatarGeorge G. Davis <gdavis@mvista.com>
Acked-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 593c252a

arch/arm/mm/cache-v6.S

+20 −8
Original line number Diff line number Diff line
@@ -203,6 +203,10 @@ ENTRY(v6_flush_kern_dcache_area) 
 *	- end     - virtual end address of region

 */

v6_dma_inv_range:

#ifdef CONFIG_DMA_CACHE_RWFO

	ldrb	r2, [r0]			@ read for ownership

	strb	r2, [r0]			@ write for ownership

#endif

	tst	r0, #D_CACHE_LINE_SIZE - 1

	bic	r0, r0, #D_CACHE_LINE_SIZE - 1

#ifdef HARVARD_CACHE
@@ -211,6 +215,10 @@ v6_dma_inv_range: 
	mcrne	p15, 0, r0, c7, c11, 1		@ clean unified line

#endif

	tst	r1, #D_CACHE_LINE_SIZE - 1

#ifdef CONFIG_DMA_CACHE_RWFO

	ldrneb	r2, [r1, #-1]			@ read for ownership

	strneb	r2, [r1, #-1]			@ write for ownership

#endif

	bic	r1, r1, #D_CACHE_LINE_SIZE - 1

#ifdef HARVARD_CACHE

	mcrne	p15, 0, r1, c7, c14, 1		@ clean & invalidate D line
@@ -218,10 +226,6 @@ v6_dma_inv_range: 
	mcrne	p15, 0, r1, c7, c15, 1		@ clean & invalidate unified line

#endif

1:

#ifdef CONFIG_DMA_CACHE_RWFO

	ldr	r2, [r0]			@ read for ownership

	str	r2, [r0]			@ write for ownership

#endif

#ifdef HARVARD_CACHE

	mcr	p15, 0, r0, c7, c6, 1		@ invalidate D line

#else
@@ -229,6 +233,10 @@ v6_dma_inv_range: 
#endif

	add	r0, r0, #D_CACHE_LINE_SIZE

	cmp	r0, r1

#ifdef CONFIG_DMA_CACHE_RWFO

	ldrlo	r2, [r0]			@ read for ownership

	strlo	r2, [r0]			@ write for ownership

#endif

	blo	1b

	mov	r0, #0

	mcr	p15, 0, r0, c7, c10, 4		@ drain write buffer
@@ -263,12 +271,12 @@ v6_dma_clean_range: 
 *	- end     - virtual end address of region

 */

ENTRY(v6_dma_flush_range)

	bic	r0, r0, #D_CACHE_LINE_SIZE - 1

1:

#ifdef CONFIG_DMA_CACHE_RWFO

	ldr	r2, [r0]			@ read for ownership

	str	r2, [r0]			@ write for ownership

	ldrb	r2, [r0]		@ read for ownership

	strb	r2, [r0]		@ write for ownership

#endif

	bic	r0, r0, #D_CACHE_LINE_SIZE - 1

1:

#ifdef HARVARD_CACHE

	mcr	p15, 0, r0, c7, c14, 1		@ clean & invalidate D line

#else
@@ -276,6 +284,10 @@ ENTRY(v6_dma_flush_range) 
#endif

	add	r0, r0, #D_CACHE_LINE_SIZE

	cmp	r0, r1

#ifdef CONFIG_DMA_CACHE_RWFO

	ldrlob	r2, [r0]			@ read for ownership

	strlob	r2, [r0]			@ write for ownership

#endif

	blo	1b

	mov	r0, #0

	mcr	p15, 0, r0, c7, c10, 4		@ drain write buffer

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