Commit fbabae46 authored by Rex Zhu's avatar Rex Zhu Committed by Alex Deucher
Browse files

drm/amd/powerplay: delete SMU_WRITE_INDIRECT_FIELD



the macro is as same as PHM_WRITE_INDIRECT_FIELD

Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 538fdf1f
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+0 −15
Original line number Diff line number Diff line
@@ -179,11 +179,6 @@ extern bool smum_is_hw_avfs_present(struct pp_hwmgr *hwmgr);
	    SMUM_GET_FIELD(cgs_read_ind_register(device, port, ix##reg), \
			   reg, field)






/*Operations on named fields.*/

#define SMUM_READ_VFPF_INDIRECT_FIELD(device, port, reg, field) \
@@ -199,14 +194,4 @@ extern bool smum_is_hw_avfs_present(struct pp_hwmgr *hwmgr);
			SMUM_SET_FIELD(cgs_read_ind_register(device, port, ix##reg), \
			reg, field, fieldval))


#define SMUM_WRITE_INDIRECT_FIELD(device, port, reg, field, fieldval)    		\
		cgs_write_ind_register(device, port, ix##reg, 				\
			SMUM_SET_FIELD(cgs_read_ind_register(device, port, ix##reg), 	\
				       reg, field, fieldval))





#endif
+2 −2
Original line number Diff line number Diff line
@@ -1934,9 +1934,9 @@ static int ci_start_smc(struct pp_hwmgr *hwmgr)
	ci_program_jump_on_start(hwmgr);

	/* enable smc clock */
	SMUM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMC_SYSCON_CLOCK_CNTL_0, ck_disable, 0);
	PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMC_SYSCON_CLOCK_CNTL_0, ck_disable, 0);

	SMUM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMC_SYSCON_RESET_CNTL, rst_reg, 0);
	PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMC_SYSCON_RESET_CNTL, rst_reg, 0);

	SMUM_WAIT_INDIRECT_FIELD(hwmgr, SMC_IND, FIRMWARE_FLAGS,
				 INTERRUPTS_ENABLED, 1);
+4 −4
Original line number Diff line number Diff line
@@ -41,7 +41,7 @@

static int iceland_start_smc(struct pp_hwmgr *hwmgr)
{
	SMUM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC,
	PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC,
				  SMC_SYSCON_RESET_CNTL, rst_reg, 0);

	return 0;
@@ -49,7 +49,7 @@ static int iceland_start_smc(struct pp_hwmgr *hwmgr)

static void iceland_reset_smc(struct pp_hwmgr *hwmgr)
{
	SMUM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC,
	PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC,
				  SMC_SYSCON_RESET_CNTL,
				  rst_reg, 1);
}
@@ -57,14 +57,14 @@ static void iceland_reset_smc(struct pp_hwmgr *hwmgr)

static void iceland_stop_smc_clock(struct pp_hwmgr *hwmgr)
{
	SMUM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC,
	PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC,
				  SMC_SYSCON_CLOCK_CNTL_0,
				  ck_disable, 1);
}

static void iceland_start_smc_clock(struct pp_hwmgr *hwmgr)
{
	SMUM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC,
	PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC,
				  SMC_SYSCON_CLOCK_CNTL_0,
				  ck_disable, 0);
}