Commit f8b036a7 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'irq-core-2020-08-04' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull irq updates from Thomas Gleixner:
 "The usual boring updates from the interrupt subsystem:

   - Infrastructure to allow building irqchip drivers as modules

   - Consolidation of irqchip ACPI probing

   - Removal of the EOI-preflow interrupt handler which was required for
     SPARC support and became obsolete after SPARC was converted to use
     sparse interrupts.

   - Cleanups, fixes and improvements all over the place"

* tag 'irq-core-2020-08-04' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (51 commits)
  irqchip/loongson-pch-pic: Fix the misused irq flow handler
  irqchip/loongson-htvec: Support 8 groups of HT vectors
  irqchip/loongson-liointc: Fix misuse of gc->mask_cache
  dt-bindings: interrupt-controller: Update Loongson HTVEC description
  irqchip/imx-intmux: Fix irqdata regs save in imx_intmux_runtime_suspend()
  irqchip/imx-intmux: Implement intmux runtime power management
  irqchip/gic-v4.1: Use GFP_ATOMIC flag in allocate_vpe_l1_table()
  irqchip: Fix IRQCHIP_PLATFORM_DRIVER_* compilation by including module.h
  irqchip/stm32-exti: Map direct event to irq parent
  irqchip/mtk-cirq: Convert to a platform driver
  irqchip/mtk-sysirq: Convert to a platform driver
  irqchip/qcom-pdc: Switch to using IRQCHIP_PLATFORM_DRIVER helper macros
  irqchip: Add IRQCHIP_PLATFORM_DRIVER_BEGIN/END and IRQCHIP_MATCH helper macros
  irqchip: irq-bcm2836.h: drop a duplicated word
  irqchip/gic-v4.1: Ensure accessing the correct RD when writing INVALLR
  irqchip/irq-bcm7038-l1: Guard uses of cpu_logical_map
  irqchip/gic-v3: Remove unused register definition
  irqchip/qcom-pdc: Allow QCOM_PDC to be loadable as a permanent module
  genirq: Export irq_chip_retrigger_hierarchy and irq_chip_set_vcpu_affinity_parent
  irqdomain: Export irq_domain_update_bus_token
  ...
parents 2ed90dbb 3d5128c1
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+4 −1
Original line number Diff line number Diff line
@@ -2,7 +2,10 @@ Broadcom Generic Level 2 Interrupt Controller

Required properties:

- compatible: should be "brcm,l2-intc" for latched interrupt controllers
- compatible: should be one of:
	      "brcm,hif-spi-l2-intc" or
	      "brcm,upg-aux-aon-l2-intc" or
	      "brcm,l2-intc" for latched interrupt controllers
              should be "brcm,bcm7271-l2-intc" for level interrupt controllers
- reg: specifies the base physical address and size of the registers
- interrupt-controller: identifies the node as an interrupt controller
+2 −2
Original line number Diff line number Diff line
@@ -22,8 +22,8 @@ properties:

  interrupts:
    minItems: 1
    maxItems: 4
    description: Four parent interrupts that receive chained interrupts.
    maxItems: 8
    description: Eight parent interrupts that receive chained interrupts.

  interrupt-controller: true

+0 −1
Original line number Diff line number Diff line
@@ -81,7 +81,6 @@ config SPARC64
	select RTC_DRV_STARFIRE
	select HAVE_PERF_EVENTS
	select PERF_USE_VMALLOC
	select IRQ_PREFLOW_FASTEOI
	select ARCH_HAVE_NMI_SAFE_CMPXCHG
	select HAVE_C_RECORDMCOUNT
	select HAVE_ARCH_AUDITSYSCALL
+1 −2
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@@ -425,7 +425,7 @@ config GOLDFISH_PIC
         for Goldfish based virtual platforms.

config QCOM_PDC
	bool "QCOM PDC"
	tristate "QCOM PDC"
	depends on ARCH_QCOM
	select IRQ_DOMAIN_HIERARCHY
	help
@@ -541,7 +541,6 @@ config LOONGSON_HTPIC
	default y
	select IRQ_DOMAIN
	select GENERIC_IRQ_CHIP
	select I8259
	help
	  Support for the Loongson-3 HyperTransport PIC Controller.

+1 −1
Original line number Diff line number Diff line
@@ -92,7 +92,7 @@ static int ativic32_irq_domain_map(struct irq_domain *id, unsigned int virq,
	return 0;
}

static struct irq_domain_ops ativic32_ops = {
static const struct irq_domain_ops ativic32_ops = {
	.map = ativic32_irq_domain_map,
	.xlate = irq_domain_xlate_onecell
};
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