Commit f6adb5f0 authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: Reverse preemph vs. voltage swing preference 



The DP spec says:
"When the combination of the requested pre-emphasis level and
 voltage swing exceeds the capability of a DPTX, the DPTX shall
 set the pre-emphasis level according to the request and use the
 highest voltage swing it can output with the given pre-emphasis level."
and
"When a DPTX reads a request beyond the limits of this Standard,
 the DPTX shall set the pre-emphasis level according to the request
 and set the highest voltage swing level it can output with the
 given pre-emphasis level. If a DPTX is requested for 9.5dB of
 pre-emphasis level (may be supported for a DPTX) and cannot support
 that level, it shall set the pre-emphasis level to the next
 highest level, 6dB."

Ie. we should first validate the pre-emphasis, and then select
the appropriate vswing for it.

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200512174145.3186-6-ville.syrjala@linux.intel.com


Reviewed-by: default avatarManasi Navare <manasi.d.navare@intel.com>
parent 53de0a20

drivers/gpu/drm/i915/display/intel_dp_link_training.c

+16 −16
Original line number Diff line number Diff line
@@ -34,18 +34,18 @@ intel_dp_dump_link_status(const u8 link_status[DP_LINK_STATUS_SIZE]) 
		      link_status[3], link_status[4], link_status[5]);

}



static u8 dp_pre_emphasis_max(u8 voltage_swing)

static u8 dp_voltage_max(u8 preemph)

{

	switch (voltage_swing & DP_TRAIN_VOLTAGE_SWING_MASK) {

	case DP_TRAIN_VOLTAGE_SWING_LEVEL_0:

		return DP_TRAIN_PRE_EMPH_LEVEL_3;

	case DP_TRAIN_VOLTAGE_SWING_LEVEL_1:

		return DP_TRAIN_PRE_EMPH_LEVEL_2;

	case DP_TRAIN_VOLTAGE_SWING_LEVEL_2:

		return DP_TRAIN_PRE_EMPH_LEVEL_1;

	case DP_TRAIN_VOLTAGE_SWING_LEVEL_3:

	switch (preemph & DP_TRAIN_PRE_EMPHASIS_MASK) {

	case DP_TRAIN_PRE_EMPH_LEVEL_0:

		return DP_TRAIN_VOLTAGE_SWING_LEVEL_3;

	case DP_TRAIN_PRE_EMPH_LEVEL_1:

		return DP_TRAIN_VOLTAGE_SWING_LEVEL_2;

	case DP_TRAIN_PRE_EMPH_LEVEL_2:

		return DP_TRAIN_VOLTAGE_SWING_LEVEL_1;

	case DP_TRAIN_PRE_EMPH_LEVEL_3:

	default:

		return DP_TRAIN_PRE_EMPH_LEVEL_0;

		return DP_TRAIN_VOLTAGE_SWING_LEVEL_0;

	}

}
@@ -68,15 +68,15 @@ void intel_dp_get_adjust_train(struct intel_dp *intel_dp, 
			p = this_p;

	}



	voltage_max = intel_dp->voltage_max(intel_dp);

	if (v >= voltage_max)

		v = voltage_max | DP_TRAIN_MAX_SWING_REACHED;



	preemph_max = min(intel_dp->preemph_max(intel_dp),

			  dp_pre_emphasis_max(v));

	preemph_max = intel_dp->preemph_max(intel_dp);

	if (p >= preemph_max)

		p = preemph_max | DP_TRAIN_MAX_PRE_EMPHASIS_REACHED;



	voltage_max = min(intel_dp->voltage_max(intel_dp),

			  dp_voltage_max(p));

	if (v >= voltage_max)

		v = voltage_max | DP_TRAIN_MAX_SWING_REACHED;



	for (lane = 0; lane < 4; lane++)

		intel_dp->train_set[lane] = v | p;

}

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