Commit f2b122d3 authored by David S. Miller's avatar David S. Miller
Browse files

Merge tag 'mlx5-fixes-2020-05-28' of git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linux 



Saeed Mahameed says:

====================
mlx5 fixes 2020-05-28

This series introduces some fixes to mlx5 driver.

v1->v2:
 - Fix bad sha1, Jakub.
 - Added one more patch by Pablo.
   net/mlx5e: replace EINVAL in mlx5e_flower_parse_meta()

Nothing major, the only patch worth mentioning is the suspend/resume crash
fix by adding the missing pci device handlers, the fix is very straight
forward and as Dexuan already expressed, the patch is important for Azure
users to avoid crash on VM hibernation, patch is marked for -stable v4.6
below.

Conflict note:
('net/mlx5e: Fix MLX5_TC_CT dependencies') has a trivial one line conflict
with current net-next, which can be resolved by simply using the line from
net-next.

Please pull and let me know if there is any problem.

For -stable v4.6
 ('net/mlx5: Fix crash upon suspend/resume')

For -stable v5.6
 ('net/mlx5e: replace EINVAL in mlx5e_flower_parse_meta()')
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents f9e0ce3d a683012a

drivers/net/ethernet/mellanox/mlx5/core/Kconfig

+1 −1
Original line number Diff line number Diff line
@@ -80,7 +80,7 @@ config MLX5_ESWITCH 


config MLX5_TC_CT

	bool "MLX5 TC connection tracking offload support"

	depends on MLX5_CORE_EN && NET_SWITCHDEV && NF_FLOW_TABLE && NET_ACT_CT && NET_TC_SKB_EXT

	depends on MLX5_ESWITCH && NF_FLOW_TABLE && NET_ACT_CT && NET_TC_SKB_EXT

	default y

	help

	  Say Y here if you want to support offloading connection tracking rules

drivers/net/ethernet/mellanox/mlx5/core/en.h

+6 −4
Original line number Diff line number Diff line
@@ -1068,10 +1068,12 @@ void mlx5e_deactivate_priv_channels(struct mlx5e_priv *priv); 


void mlx5e_build_default_indir_rqt(u32 *indirection_rqt, int len,

				   int num_channels);

void mlx5e_set_tx_cq_mode_params(struct mlx5e_params *params,

				 u8 cq_period_mode);

void mlx5e_set_rx_cq_mode_params(struct mlx5e_params *params,

				 u8 cq_period_mode);



void mlx5e_reset_tx_moderation(struct mlx5e_params *params, u8 cq_period_mode);

void mlx5e_reset_rx_moderation(struct mlx5e_params *params, u8 cq_period_mode);

void mlx5e_set_tx_cq_mode_params(struct mlx5e_params *params, u8 cq_period_mode);

void mlx5e_set_rx_cq_mode_params(struct mlx5e_params *params, u8 cq_period_mode);



void mlx5e_set_rq_type(struct mlx5_core_dev *mdev, struct mlx5e_params *params);

void mlx5e_init_rq_type_params(struct mlx5_core_dev *mdev,

			       struct mlx5e_params *params);

drivers/net/ethernet/mellanox/mlx5/core/en/port.c

+13 −11
Original line number Diff line number Diff line
@@ -371,12 +371,14 @@ enum mlx5e_fec_supported_link_mode { 


#define MLX5E_FEC_OVERRIDE_ADMIN_50G_POLICY(buf, policy, write, link)			\

	do {										\

		unsigned long policy_long;						\

		u16 *__policy = &(policy);						\

		bool _write = (write);							\

											\

		policy_long = *__policy;						\

		if (_write && *__policy)						\

			*__policy = find_first_bit((u_long *)__policy,		\

						   sizeof(u16) * BITS_PER_BYTE);\

			*__policy = find_first_bit(&policy_long,			\

						   sizeof(policy_long) * BITS_PER_BYTE);\

		MLX5E_FEC_OVERRIDE_ADMIN_POLICY(buf, *__policy, _write, link);		\

		if (!_write && *__policy)						\

			*__policy = 1 << *__policy;					\

drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c

+28 −13
Original line number Diff line number Diff line
@@ -527,8 +527,8 @@ int mlx5e_ethtool_set_coalesce(struct mlx5e_priv *priv, 
	struct dim_cq_moder *rx_moder, *tx_moder;

	struct mlx5_core_dev *mdev = priv->mdev;

	struct mlx5e_channels new_channels = {};

	bool reset_rx, reset_tx;

	int err = 0;

	bool reset;



	if (!MLX5_CAP_GEN(mdev, cq_moderation))

		return -EOPNOTSUPP;
@@ -566,15 +566,28 @@ int mlx5e_ethtool_set_coalesce(struct mlx5e_priv *priv, 
	}

	/* we are opened */



	reset = (!!coal->use_adaptive_rx_coalesce != priv->channels.params.rx_dim_enabled) ||

		(!!coal->use_adaptive_tx_coalesce != priv->channels.params.tx_dim_enabled);

	reset_rx = !!coal->use_adaptive_rx_coalesce != priv->channels.params.rx_dim_enabled;

	reset_tx = !!coal->use_adaptive_tx_coalesce != priv->channels.params.tx_dim_enabled;



	if (!reset) {

	if (!reset_rx && !reset_tx) {

		mlx5e_set_priv_channels_coalesce(priv, coal);

		priv->channels.params = new_channels.params;

		goto out;

	}



	if (reset_rx) {

		u8 mode = MLX5E_GET_PFLAG(&new_channels.params,

					  MLX5E_PFLAG_RX_CQE_BASED_MODER);



		mlx5e_reset_rx_moderation(&new_channels.params, mode);

	}

	if (reset_tx) {

		u8 mode = MLX5E_GET_PFLAG(&new_channels.params,

					  MLX5E_PFLAG_TX_CQE_BASED_MODER);



		mlx5e_reset_tx_moderation(&new_channels.params, mode);

	}



	err = mlx5e_safe_switch_channels(priv, &new_channels, NULL, NULL);



out:
@@ -665,11 +678,12 @@ static const u32 pplm_fec_2_ethtool_linkmodes[] = { 
static int get_fec_supported_advertised(struct mlx5_core_dev *dev,

					struct ethtool_link_ksettings *link_ksettings)

{

	u_long active_fec = 0;

	unsigned long active_fec_long;

	u32 active_fec;

	u32 bitn;

	int err;



	err = mlx5e_get_fec_mode(dev, (u32 *)&active_fec, NULL);

	err = mlx5e_get_fec_mode(dev, &active_fec, NULL);

	if (err)

		return (err == -EOPNOTSUPP) ? 0 : err;
@@ -682,10 +696,11 @@ static int get_fec_supported_advertised(struct mlx5_core_dev *dev, 
	MLX5E_ADVERTISE_SUPPORTED_FEC(MLX5E_FEC_LLRS_272_257_1,

				      ETHTOOL_LINK_MODE_FEC_LLRS_BIT);



	active_fec_long = active_fec;

	/* active fec is a bit set, find out which bit is set and

	 * advertise the corresponding ethtool bit

	 */

	bitn = find_first_bit(&active_fec, sizeof(u32) * BITS_PER_BYTE);

	bitn = find_first_bit(&active_fec_long, sizeof(active_fec_long) * BITS_PER_BYTE);

	if (bitn < ARRAY_SIZE(pplm_fec_2_ethtool_linkmodes))

		__set_bit(pplm_fec_2_ethtool_linkmodes[bitn],

			  link_ksettings->link_modes.advertising);
@@ -1517,8 +1532,8 @@ static int mlx5e_get_fecparam(struct net_device *netdev, 
{

	struct mlx5e_priv *priv = netdev_priv(netdev);

	struct mlx5_core_dev *mdev = priv->mdev;

	u16 fec_configured = 0;

	u32 fec_active = 0;

	u16 fec_configured;

	u32 fec_active;

	int err;



	err = mlx5e_get_fec_mode(mdev, &fec_active, &fec_configured);
@@ -1526,14 +1541,14 @@ static int mlx5e_get_fecparam(struct net_device *netdev, 
	if (err)

		return err;



	fecparam->active_fec = pplm2ethtool_fec((u_long)fec_active,

						sizeof(u32) * BITS_PER_BYTE);

	fecparam->active_fec = pplm2ethtool_fec((unsigned long)fec_active,

						sizeof(unsigned long) * BITS_PER_BYTE);



	if (!fecparam->active_fec)

		return -EOPNOTSUPP;



	fecparam->fec = pplm2ethtool_fec((u_long)fec_configured,

					 sizeof(u16) * BITS_PER_BYTE);

	fecparam->fec = pplm2ethtool_fec((unsigned long)fec_configured,

					 sizeof(unsigned long) * BITS_PER_BYTE);



	return 0;

}

drivers/net/ethernet/mellanox/mlx5/core/en_main.c

+14 −6
Original line number Diff line number Diff line
@@ -4716,7 +4716,7 @@ static u8 mlx5_to_net_dim_cq_period_mode(u8 cq_period_mode) 
		DIM_CQ_PERIOD_MODE_START_FROM_EQE;

}



void mlx5e_set_tx_cq_mode_params(struct mlx5e_params *params, u8 cq_period_mode)

void mlx5e_reset_tx_moderation(struct mlx5e_params *params, u8 cq_period_mode)

{

	if (params->tx_dim_enabled) {

		u8 dim_period_mode = mlx5_to_net_dim_cq_period_mode(cq_period_mode);
@@ -4725,13 +4725,9 @@ void mlx5e_set_tx_cq_mode_params(struct mlx5e_params *params, u8 cq_period_mode) 
	} else {

		params->tx_cq_moderation = mlx5e_get_def_tx_moderation(cq_period_mode);

	}



	MLX5E_SET_PFLAG(params, MLX5E_PFLAG_TX_CQE_BASED_MODER,

			params->tx_cq_moderation.cq_period_mode ==

				MLX5_CQ_PERIOD_MODE_START_FROM_CQE);

}



void mlx5e_set_rx_cq_mode_params(struct mlx5e_params *params, u8 cq_period_mode)

void mlx5e_reset_rx_moderation(struct mlx5e_params *params, u8 cq_period_mode)

{

	if (params->rx_dim_enabled) {

		u8 dim_period_mode = mlx5_to_net_dim_cq_period_mode(cq_period_mode);
@@ -4740,7 +4736,19 @@ void mlx5e_set_rx_cq_mode_params(struct mlx5e_params *params, u8 cq_period_mode) 
	} else {

		params->rx_cq_moderation = mlx5e_get_def_rx_moderation(cq_period_mode);

	}

}



void mlx5e_set_tx_cq_mode_params(struct mlx5e_params *params, u8 cq_period_mode)

{

	mlx5e_reset_tx_moderation(params, cq_period_mode);

	MLX5E_SET_PFLAG(params, MLX5E_PFLAG_TX_CQE_BASED_MODER,

			params->tx_cq_moderation.cq_period_mode ==

				MLX5_CQ_PERIOD_MODE_START_FROM_CQE);

}



void mlx5e_set_rx_cq_mode_params(struct mlx5e_params *params, u8 cq_period_mode)

{

	mlx5e_reset_rx_moderation(params, cq_period_mode);

	MLX5E_SET_PFLAG(params, MLX5E_PFLAG_RX_CQE_BASED_MODER,

			params->rx_cq_moderation.cq_period_mode ==

				MLX5_CQ_PERIOD_MODE_START_FROM_CQE);

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