Commit f0e56c8d authored by Jose Abreu's avatar Jose Abreu Committed by David S. Miller
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net: stmmac: xgmac3+: Add support for Frame Preemption



Adds the HW specific support for Frame Preemption on XGMAC3+ cores.

Signed-off-by: default avatarJose Abreu <Jose.Abreu@synopsys.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 7c728274
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+6 −0
Original line number Diff line number Diff line
@@ -73,6 +73,9 @@
#define XGMAC_RXQ_CTRL0			0x000000a0
#define XGMAC_RXQEN(x)			GENMASK((x) * 2 + 1, (x) * 2)
#define XGMAC_RXQEN_SHIFT(x)		((x) * 2)
#define XGMAC_RXQ_CTRL1			0x000000a4
#define XGMAC_RQ			GENMASK(7, 4)
#define XGMAC_RQ_SHIFT			4
#define XGMAC_RXQ_CTRL2			0x000000a8
#define XGMAC_RXQ_CTRL3			0x000000ac
#define XGMAC_PSRQ(x)			GENMASK((x) * 8 + 7, (x) * 8)
@@ -136,6 +139,7 @@
#define XGMAC_HWFEAT_TXQCNT		GENMASK(9, 6)
#define XGMAC_HWFEAT_RXQCNT		GENMASK(3, 0)
#define XGMAC_HW_FEATURE3		0x00000128
#define XGMAC_HWFEAT_FPESEL		BIT(26)
#define XGMAC_HWFEAT_ESTWID		GENMASK(24, 23)
#define XGMAC_HWFEAT_ESTDEP		GENMASK(22, 20)
#define XGMAC_HWFEAT_ESTSEL		BIT(19)
@@ -151,6 +155,8 @@
#define XGMAC_MDIO_ADDR			0x00000200
#define XGMAC_MDIO_DATA			0x00000204
#define XGMAC_MDIO_C22P			0x00000220
#define XGMAC_FPE_CTRL_STS		0x00000280
#define XGMAC_EFPE			BIT(0)
#define XGMAC_ADDRx_HIGH(x)		(0x00000300 + (x) * 0x8)
#define XGMAC_ADDR_MAX			32
#define XGMAC_AE			BIT(31)
+24 −0
Original line number Diff line number Diff line
@@ -1410,6 +1410,29 @@ static int dwxgmac3_est_configure(void __iomem *ioaddr, struct stmmac_est *cfg,
	return 0;
}

static void dwxgmac3_fpe_configure(void __iomem *ioaddr, u32 num_txq,
				   u32 num_rxq, bool enable)
{
	u32 value;

	if (!enable) {
		value = readl(ioaddr + XGMAC_FPE_CTRL_STS);

		value &= ~XGMAC_EFPE;

		writel(value, ioaddr + XGMAC_FPE_CTRL_STS);
	}

	value = readl(ioaddr + XGMAC_RXQ_CTRL1);
	value &= ~XGMAC_RQ;
	value |= (num_rxq - 1) << XGMAC_RQ_SHIFT;
	writel(value, ioaddr + XGMAC_RXQ_CTRL1);

	value = readl(ioaddr + XGMAC_FPE_CTRL_STS);
	value |= XGMAC_EFPE;
	writel(value, ioaddr + XGMAC_FPE_CTRL_STS);
}

const struct stmmac_ops dwxgmac210_ops = {
	.core_init = dwxgmac2_core_init,
	.set_mac = dwxgmac2_set_mac,
@@ -1454,6 +1477,7 @@ const struct stmmac_ops dwxgmac210_ops = {
	.config_l4_filter = dwxgmac2_config_l4_filter,
	.set_arp_offload = dwxgmac2_set_arp_offload,
	.est_configure = dwxgmac3_est_configure,
	.fpe_configure = dwxgmac3_fpe_configure,
};

int dwxgmac2_setup(struct stmmac_priv *priv)
+1 −0
Original line number Diff line number Diff line
@@ -429,6 +429,7 @@ static void dwxgmac2_get_hw_feature(void __iomem *ioaddr,

	/* MAC HW feature 3 */
	hw_cap = readl(ioaddr + XGMAC_HW_FEATURE3);
	dma_cap->fpesel = (hw_cap & XGMAC_HWFEAT_FPESEL) >> 26;
	dma_cap->estwid = (hw_cap & XGMAC_HWFEAT_ESTWID) >> 23;
	dma_cap->estdep = (hw_cap & XGMAC_HWFEAT_ESTDEP) >> 20;
	dma_cap->estsel = (hw_cap & XGMAC_HWFEAT_ESTSEL) >> 19;