Commit 7c728274 authored by Jose Abreu's avatar Jose Abreu Committed by David S. Miller
Browse files

net: stmmac: gmac5+: Add support for Frame Preemption 



Adds the HW specific support for Frame Preemption on GMAC5+ cores.

Signed-off-by: default avatarJose Abreu <Jose.Abreu@synopsys.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 1ac14241

drivers/net/ethernet/stmicro/stmmac/dwmac4.h

+3 −0
Original line number Diff line number Diff line
@@ -64,6 +64,8 @@ 
#define GMAC_RXQCTRL_MCBCQEN_SHIFT	20

#define GMAC_RXQCTRL_TACPQE		BIT(21)

#define GMAC_RXQCTRL_TACPQE_SHIFT	21

#define GMAC_RXQCTRL_FPRQ		GENMASK(26, 24)

#define GMAC_RXQCTRL_FPRQ_SHIFT		24



/* MAC Packet Filtering */

#define GMAC_PACKET_FILTER_PR		BIT(0)
@@ -237,6 +239,7 @@ enum power_event { 


/* MAC HW features3 bitmap */

#define GMAC_HW_FEAT_ASP		GENMASK(29, 28)

#define GMAC_HW_FEAT_FPESEL		BIT(26)

#define GMAC_HW_FEAT_ESTWID		GENMASK(21, 20)

#define GMAC_HW_FEAT_ESTDEP		GENMASK(19, 17)

#define GMAC_HW_FEAT_ESTSEL		BIT(16)

drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c

+2 −0
Original line number Diff line number Diff line
@@ -985,6 +985,7 @@ const struct stmmac_ops dwmac410_ops = { 
	.config_l3_filter = dwmac4_config_l3_filter,

	.config_l4_filter = dwmac4_config_l4_filter,

	.est_configure = dwmac5_est_configure,

	.fpe_configure = dwmac5_fpe_configure,

};



const struct stmmac_ops dwmac510_ops = {
@@ -1029,6 +1030,7 @@ const struct stmmac_ops dwmac510_ops = { 
	.config_l3_filter = dwmac4_config_l3_filter,

	.config_l4_filter = dwmac4_config_l4_filter,

	.est_configure = dwmac5_est_configure,

	.fpe_configure = dwmac5_fpe_configure,

};



int dwmac4_setup(struct stmmac_priv *priv)

drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c

+1 −0
Original line number Diff line number Diff line
@@ -404,6 +404,7 @@ static void dwmac4_get_hw_feature(void __iomem *ioaddr, 


	/* 5.10 Features */

	dma_cap->asp = (hw_cap & GMAC_HW_FEAT_ASP) >> 28;

	dma_cap->fpesel = (hw_cap & GMAC_HW_FEAT_FPESEL) >> 26;

	dma_cap->estwid = (hw_cap & GMAC_HW_FEAT_ESTWID) >> 20;

	dma_cap->estdep = (hw_cap & GMAC_HW_FEAT_ESTDEP) >> 17;

	dma_cap->estsel = (hw_cap & GMAC_HW_FEAT_ESTSEL) >> 16;

drivers/net/ethernet/stmicro/stmmac/dwmac5.c

+23 −0
Original line number Diff line number Diff line
@@ -645,3 +645,26 @@ int dwmac5_est_configure(void __iomem *ioaddr, struct stmmac_est *cfg, 
	writel(ctrl, ioaddr + MTL_EST_CONTROL);

	return 0;

}



void dwmac5_fpe_configure(void __iomem *ioaddr, u32 num_txq, u32 num_rxq,

			  bool enable)

{

	u32 value;



	if (!enable) {

		value = readl(ioaddr + MAC_FPE_CTRL_STS);



		value &= ~EFPE;



		writel(value, ioaddr + MAC_FPE_CTRL_STS);

	}



	value = readl(ioaddr + GMAC_RXQ_CTRL1);

	value &= ~GMAC_RXQCTRL_FPRQ;

	value |= (num_rxq - 1) << GMAC_RXQCTRL_FPRQ_SHIFT;

	writel(value, ioaddr + GMAC_RXQ_CTRL1);



	value = readl(ioaddr + MAC_FPE_CTRL_STS);

	value |= EFPE;

	writel(value, ioaddr + MAC_FPE_CTRL_STS);

}

drivers/net/ethernet/stmicro/stmmac/dwmac5.h

+5 −0
Original line number Diff line number Diff line
@@ -11,6 +11,9 @@ 
#define PRTYEN				BIT(1)

#define TMOUTEN				BIT(0)



#define MAC_FPE_CTRL_STS		0x00000234

#define EFPE				BIT(0)



#define MAC_PPS_CONTROL			0x00000b70

#define PPS_MAXIDX(x)			((((x) + 1) * 8) - 1)

#define PPS_MINIDX(x)			((x) * 8)
@@ -102,5 +105,7 @@ int dwmac5_flex_pps_config(void __iomem *ioaddr, int index, 
			   u32 sub_second_inc, u32 systime_flags);

int dwmac5_est_configure(void __iomem *ioaddr, struct stmmac_est *cfg,

			 unsigned int ptp_rate);

void dwmac5_fpe_configure(void __iomem *ioaddr, u32 num_txq, u32 num_rxq,

			  bool enable);



#endif /* __DWMAC5_H__ */

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