Commit f02635ea authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'qcom-dts-for-5.1' of... 

Merge tag 'qcom-dts-for-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into arm/dt

Qualcomm Device Tree Changes for v5.1

* Fixup GIC IRQ flags and GSBI state on MSM8660
* Add USB OTG, gpio ranges, and Wifi support on MSM8974 Hammerhead
* Remove skeleton.dtsi on IPQ4019

* tag 'qcom-dts-for-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux

:
  ARM: dts: ipq4019: Remove skeleton.dtsi
  ARM: dts: qcom: msm8974-hammerhead: add USB OTG support
  ARM: dts: qcom: msm8974: add gpio-ranges
  ARM: dts: qcom: msm8974-hammerhead: add WiFi support
  ARM: dts: msm8660: Fix up GIC IRQ flags
  ARM: dts: msm8660: Mark two GSBI blocks "disabled"

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 2ab58c85 40122db8

arch/arm/boot/dts/qcom-ipq4019.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -20,6 +20,7 @@ 
/ {

	#address-cells = <1>;

	#size-cells = <1>;



	model = "Qualcomm Technologies, Inc. IPQ4019";

	compatible = "qcom,ipq4019";

	interrupt-parent = <&intc>;

arch/arm/boot/dts/qcom-msm8660.dtsi

+9 −7
Original line number Diff line number Diff line
@@ -138,6 +138,7 @@ 
			#address-cells = <1>;

			#size-cells = <1>;

			ranges;

			status = "disabled";



			syscon-tcsr = <&tcsr>;
@@ -145,7 +146,7 @@ 
				compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";

				reg = <0x16540000 0x1000>,

				      <0x16500000 0x1000>;

				interrupts = <GIC_SPI 156 IRQ_TYPE_NONE>;

				interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&gcc GSBI6_UART_CLK>, <&gcc GSBI6_H_CLK>;

				clock-names = "core", "iface";

				status = "disabled";
@@ -154,7 +155,7 @@ 
			gsbi6_i2c: i2c@16580000 {

				compatible = "qcom,i2c-qup-v1.1.1";

				reg = <0x16580000 0x1000>;

				interrupts = <GIC_SPI 157 IRQ_TYPE_NONE>;

				interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&gcc GSBI6_QUP_CLK>, <&gcc GSBI6_H_CLK>;

				clock-names = "core", "iface";

				#address-cells = <1>;
@@ -172,6 +173,7 @@ 
			#address-cells = <1>;

			#size-cells = <1>;

			ranges;

			status = "disabled";



			syscon-tcsr = <&tcsr>;
@@ -179,7 +181,7 @@ 
				compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";

				reg = <0x16640000 0x1000>,

				      <0x16600000 0x1000>;

				interrupts = <GIC_SPI 158 IRQ_TYPE_NONE>;

				interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&gcc GSBI7_UART_CLK>, <&gcc GSBI7_H_CLK>;

				clock-names = "core", "iface";

				status = "disabled";
@@ -188,7 +190,7 @@ 
			gsbi7_i2c: i2c@16680000 {

				compatible = "qcom,i2c-qup-v1.1.1";

				reg = <0x16680000 0x1000>;

				interrupts = <GIC_SPI 159 IRQ_TYPE_NONE>;

				interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&gcc GSBI7_QUP_CLK>, <&gcc GSBI7_H_CLK>;

				clock-names = "core", "iface";

				#address-cells = <1>;
@@ -212,7 +214,7 @@ 
			gsbi8_i2c: i2c@19880000 {

				compatible = "qcom,i2c-qup-v1.1.1";

				reg = <0x19880000 0x1000>;

				interrupts = <GIC_SPI 161 IRQ_TYPE_NONE>;

				interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&gcc GSBI8_QUP_CLK>, <&gcc GSBI8_H_CLK>;

				clock-names = "core", "iface";

				#address-cells = <1>;
@@ -237,7 +239,7 @@ 
				compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";

				reg = <0x19c40000 0x1000>,

				      <0x19c00000 0x1000>;

				interrupts = <0 195 IRQ_TYPE_NONE>;

				interrupts = <0 195 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&gcc GSBI12_UART_CLK>, <&gcc GSBI12_H_CLK>;

				clock-names = "core", "iface";

				status = "disabled";
@@ -246,7 +248,7 @@ 
			gsbi12_i2c: i2c@19c80000 {

				compatible = "qcom,i2c-qup-v1.1.1";

				reg = <0x19c80000 0x1000>;

				interrupts = <0 196 IRQ_TYPE_NONE>;

				interrupts = <0 196 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&gcc GSBI12_QUP_CLK>, <&gcc GSBI12_H_CLK>;

				clock-names = "core", "iface";

				#address-cells = <1>;

arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts

+130 −0
Original line number Diff line number Diff line
@@ -220,6 +220,20 @@ 
			};

		};

	};



	vreg_wlan: wlan-regulator {

		compatible = "regulator-fixed";



		regulator-name = "wl-reg";

		regulator-min-microvolt = <3300000>;

		regulator-max-microvolt = <3300000>;



		gpio = <&msmgpio 26 GPIO_ACTIVE_HIGH>;

		enable-active-high;



		pinctrl-names = "default";

		pinctrl-0 = <&wlan_regulator_pin>;

	};

};



&soc {
@@ -242,6 +256,30 @@ 
			};

		};



		sdhc2_pin_a: sdhc2-pin-active {

			clk {

				pins = "sdc2_clk";

				drive-strength = <6>;

				bias-disable;

			};



			cmd-data {

				pins = "sdc2_cmd", "sdc2_data";

				drive-strength = <6>;

				bias-pull-up;

			};

		};



		i2c1_pins: i2c1 {

			mux {

				pins = "gpio2", "gpio3";

				function = "blsp_i2c1";



				drive-strength = <2>;

				bias-disable;

			};

		};



		i2c3_pins: i2c3 {

			mux {

				pins = "gpio10", "gpio11";
@@ -283,6 +321,32 @@ 
		pinctrl-0 = <&sdhc1_pin_a>;

	};



	sdhci@f98a4900 {

		status = "ok";



		max-frequency = <100000000>;

		bus-width = <4>;

		non-removable;

		vmmc-supply = <&vreg_wlan>;

		vqmmc-supply = <&pm8941_s3>;



		pinctrl-names = "default";

		pinctrl-0 = <&sdhc2_pin_a>;



		#address-cells = <1>;

		#size-cells = <0>;



		bcrmf@1 {

			compatible = "brcm,bcm4339-fmac", "brcm,bcm4329-fmac";

			reg = <1>;



			brcm,drive-strength = <10>;



			pinctrl-names = "default";

			pinctrl-0 = <&wlan_sleep_clk_pin>;

		};

	};



	gpio-keys {

		compatible = "gpio-keys";

		input-name = "gpio-keys";
@@ -342,6 +406,24 @@ 
		};

	};



	i2c@f9923000 {

		status = "ok";

		pinctrl-names = "default";

		pinctrl-0 = <&i2c1_pins>;

		clock-frequency = <100000>;

		qcom,src-freq = <50000000>;



		charger: bq24192@6b {

			compatible = "ti,bq24192";

			reg = <0x6b>;

			interrupts-extended = <&spmi_bus 0 0xd5 0 IRQ_TYPE_EDGE_FALLING>;



			omit-battery-class;



			usb_otg_vbus: usb-otg-vbus { };

		};

	};



	i2c@f9925000 {

		status = "ok";

		pinctrl-names = "default";
@@ -359,6 +441,31 @@ 
			amstaos,proximity-diodes = <0>;

		};

	};



	usb@f9a55000 {

		status = "ok";



		phys = <&usb_hs1_phy>;

		phy-select = <&tcsr 0xb000 0>;



		extcon = <&charger>, <&usb_id>;

		vbus-supply = <&usb_otg_vbus>;



		hnp-disable;

		srp-disable;

		adp-disable;



		ulpi {

			phy@a {

				status = "ok";



				v1p8-supply = <&pm8941_l6>;

				v3p3-supply = <&pm8941_l24>;



				qcom,init-seq = /bits/ 8 <0x1 0x64>;

			};

		};

	};

};



&spmi_bus {
@@ -371,6 +478,29 @@ 
				bias-pull-up;

				power-source = <PM8941_GPIO_S3>;

			};



			wlan_sleep_clk_pin: wl-sleep-clk {

				pins = "gpio16";

				function = "func2";



				output-high;

				power-source = <PM8941_GPIO_S3>;

			};



			wlan_regulator_pin: wl-reg-active {

				pins = "gpio17";

				function = "normal";



				bias-disable;

				power-source = <PM8941_GPIO_S3>;

			};



			otg {

				gpio-hog;

				gpios = <35 GPIO_ACTIVE_HIGH>;

				output-high;

				line-name = "otg-gpio";

			};

		};

	};

};

arch/arm/boot/dts/qcom-msm8974.dtsi

+11 −0
Original line number Diff line number Diff line
@@ -712,6 +712,17 @@ 
			interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;

		};



		i2c@f9923000 {

			status = "disabled";

			compatible = "qcom,i2c-qup-v2.1.1";

			reg = <0xf9923000 0x1000>;

			interrupts = <0 95 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>;

			clock-names = "core", "iface";

			#address-cells = <1>;

			#size-cells = <0>;

		};



		i2c@f9924000 {

			status = "disabled";

			compatible = "qcom,i2c-qup-v2.1.1";

arch/arm/boot/dts/qcom-pm8941.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -63,6 +63,7 @@ 
			compatible = "qcom,pm8941-gpio", "qcom,spmi-gpio";

			reg = <0xc000>;

			gpio-controller;

			gpio-ranges = <&pm8941_gpios 0 0 36>;

			#gpio-cells = <2>;

			interrupts = <0 0xc0 0 IRQ_TYPE_NONE>,

				     <0 0xc1 0 IRQ_TYPE_NONE>,

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