Merge tag 'drm-fixes-2019-11-08' of git://anongit.freedesktop.org/drm/drm (efc61f7c) · Commits · 戴 / test

Pull drm fixes from Dave Airlie: "Weekly fixes for drm: amdgpu has a few but they are pretty scattered fixes, the fbdev one is a build regression fix that we didn't want to risk leaving out, otherwise a couple of i915, one radeon and a core atomic fix. core: - add missing documentation for GEM shmem madvise helpers - Fix for a state dereference in atomic self-refresh helpers fbdev: - One compilation fix for c2p fbdev helpers amdgpu: - Fix navi14 display issue root cause and revert workaround - GPU reset scheduler interaction fix - Fix fan boost on multi-GPU - Gfx10 and sdma5 fixes for navi - GFXOFF fix for renoir - Add navi14 PCI ID - GPUVM fix for arcturus radeon: - Port an SI power fix from amdgpu i915: - Fix HPD poll to avoid kworker consuming a lot of cpu cycles. - Do not use TBT type for non Type-C ports" * tag 'drm-fixes-2019-11-08' of git://anongit.freedesktop.org/drm/drm: drm/radeon: fix si_enable_smc_cac() failed issue drm/amdgpu/renoir: move gfxoff handling into gfx9 module drm/amdgpu: add warning for GRBM 1-cycle delay issue in gfx9 drm/amdgpu: add dummy read by engines for some GCVM status registers in gfx10 drm/amdgpu: register gpu instance before fan boost feature enablment drm/amd/swSMU: fix smu workload bit map error drm/shmem: Add docbook comments for drm_gem_shmem_object madvise fields drm/amdgpu: add navi14 PCI ID Revert "drm/amd/display: setting the DIG_MODE to the correct value." drm/amd/display: Add ENGINE_ID_DIGD condition check for Navi14 drm/amdgpu: dont schedule jobs while in reset drm/amdgpu/arcturus: properly set BANK_SELECT and FRAGMENT_SIZE drm/atomic: fix self-refresh helpers crtc state dereference drm/i915/dp: Do not switch aux to TBT mode for non-TC ports drm/i915: Avoid HPD poll detect triggering a new detect cycle fbdev: c2p: Fix link failure on non-inlining

drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c

+4 −1

Original line number	Diff line number	Diff line
		@@ -604,8 +604,11 @@ void amdgpu_ctx_mgr_entity_fini(struct amdgpu_ctx_mgr *mgr)
		continue;
		}

		for (i = 0; i < num_entities; i++)
		for (i = 0; i < num_entities; i++) {
		mutex_lock(&ctx->adev->lock_reset);
		drm_sched_entity_fini(&ctx->entities[0][i].entity);
		mutex_unlock(&ctx->adev->lock_reset);
		}
		}
		}

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

+7 −0

Original line number	Diff line number	Diff line
		@@ -2885,6 +2885,13 @@ fence_driver_init:
		DRM_INFO("amdgpu: acceleration disabled, skipping benchmarks\n");
		}

		/*
		* Register gpu instance before amdgpu_device_enable_mgpu_fan_boost.
		* Otherwise the mgpu fan boost feature will be skipped due to the
		* gpu instance is counted less.
		*/
		amdgpu_register_gpu_instance(adev);

		/* enable clockgating, etc. after ib tests, etc. since some blocks require
		* explicit gating rather than handling it automatically.
		*/

drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c

+1 −0

Original line number	Diff line number	Diff line
		@@ -1016,6 +1016,7 @@ static const struct pci_device_id pciidlist[] = {
		{0x1002, 0x7340, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI14\|AMD_EXP_HW_SUPPORT},
		{0x1002, 0x7341, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI14\|AMD_EXP_HW_SUPPORT},
		{0x1002, 0x7347, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI14\|AMD_EXP_HW_SUPPORT},
		{0x1002, 0x734F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI14\|AMD_EXP_HW_SUPPORT},

		/* Renoir */
		{0x1002, 0x1636, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RENOIR\|AMD_IS_APU\|AMD_EXP_HW_SUPPORT},

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h

+1 −0

Original line number	Diff line number	Diff line
		@@ -289,6 +289,7 @@ struct amdgpu_gfx {
		uint32_t mec2_feature_version;
		bool mec_fw_write_wait;
		bool me_fw_write_wait;
		bool cp_fw_write_wait;
		struct amdgpu_ring gfx_ring[AMDGPU_MAX_GFX_RINGS];
		unsigned num_gfx_rings;
		struct amdgpu_ring compute_ring[AMDGPU_MAX_COMPUTE_RINGS];

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c

+0 −1

Original line number	Diff line number	Diff line
		@@ -190,7 +190,6 @@ int amdgpu_driver_load_kms(struct drm_device *dev, unsigned long flags)
		pm_runtime_put_autosuspend(dev->dev);
		}

		amdgpu_register_gpu_instance(adev);
		out:
		if (r) {
		/* balance pm_runtime_get_sync in amdgpu_driver_unload_kms */

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