Commit eb672def authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'omap-for-v5.11/genpd-am437x-signed' of...

Merge tag 'omap-for-v5.11/genpd-am437x-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/omap-genpd

Update am473x to boot without platform data

Similar to am335x, we can now update am437x dts files to boot
with genpd and simple-pm-bus, and drop the related platform data.

To do that, we need to do the following changes for am437x:

- Update the clock driver to keep the l3_main clock always on for
  suspend and resume to work

- Add power domain and reset controller data to omap-prm driver

- Configure interconnect clocks for system timers as those are
  now managed separately by the drivers/clocksource drivers

- Update control module, wkup_m3, emif, ocmcram, mpuss and l3_noc
  for device tree data and drop the legacy platform data

- Update the interconnect instances to boot with gendp and
  simple-pm-bus

- Drop the remaining platform data for am437x

* tag 'omap-for-v5.11/genpd-am437x-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP2+: Drop legacy remaining legacy platform data for am4
  ARM: dts: Use simple-pm-bus for genpd for am4 l3
  ARM: dts: Move am4 l3 noc to a separate node
  ARM: dts: Use simple-pm-bus for genpd for am4 l4_per
  ARM: dts: Use simple-pm-bus for genpd for am4 l4_fast
  ARM: dts: Use simple-pm-bus for genpd for am4 l4_wkup
  ARM: OMAP2+: Drop legacy platform data for am4 mpuss
  ARM: OMAP2+: Drop legacy platform data for am4 ocmcram
  ARM: OMAP2+: Drop legacy platform data for am4 emif
  ARM: OMAP2+: Drop legacy platform data for am4 wkup_m3
  ARM: dts: Configure interconnect target module for am4 wkup_m3
  ARM: dts: Configure RTC powerdomain for am4
  ARM: OMAP2+: Drop legacy platform data for am4 control module
  ARM: dts: Configure also interconnect clocks for am4 system timer
  ARM: dts: am43xx: add remaining PRM instances
  soc: ti: omap-prm: am4: add genpd support for remaining PRM instances
  clk: ti: am437x: Keep am4 l3 main clock always on for genpd

Link: https://lore.kernel.org/r/pull-1606806458-694517@atomide.com-3


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 07dd966d df6c2ec8
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+84 −40
Original line number Diff line number Diff line
@@ -107,12 +107,6 @@

	soc {
		compatible = "ti,omap-infra";
		mpu {
			compatible = "ti,omap4-mpu";
			ti,hwmods = "mpu";
			pm-sram = <&pm_sram_code
				   &pm_sram_data>;
		};
	};

	gic: interrupt-controller@48241000 {
@@ -161,41 +155,49 @@
	};

	ocp@44000000 {
		compatible = "ti,am4372-l3-noc", "simple-bus";
		compatible = "simple-pm-bus";
		power-domains = <&prm_per>;
		clocks = <&l3_clkctrl AM4_L3_L3_MAIN_CLKCTRL 0>;
		clock-names = "fck";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;
		ti,hwmods = "l3_main";
		ti,no-idle;
		reg = <0x44000000 0x400000
		       0x44800000 0x400000>;

		l3-noc@44000000 {
			compatible = "ti,am4372-l3-noc";
			reg = <0x44000000 0x400000>,
			      <0x44800000 0x400000>;
			interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
		};

		l4_wkup: interconnect@44c00000 {
			wkup_m3: wkup_m3@100000 {
				compatible = "ti,am4372-wkup-m3";
				reg = <0x100000 0x4000>,
				      <0x180000	0x2000>;
				reg-names = "umem", "dmem";
				ti,hwmods = "wkup_m3";
				ti,pm-firmware = "am335x-pm-firmware.elf";
			};
		};
		l4_per: interconnect@48000000 {
		};
		l4_fast: interconnect@4a000000 {
		};

		emif: emif@4c000000 {
		target-module@4c000000 {
			compatible = "ti,sysc-omap4-simple", "ti,sysc";
			reg = <0x4c000000 0x4>;
			reg-names = "rev";
			clocks = <&emif_clkctrl AM4_EMIF_EMIF_CLKCTRL 0>;
			clock-names = "fck";
			ti,no-idle;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x0 0x4c000000 0x1000000>;

			emif: emif@0 {
				compatible = "ti,emif-am4372";
			reg = <0x4c000000 0x1000000>;
			ti,hwmods = "emif";
				reg = <0 0x1000000>;
				interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
			ti,no-idle;
				sram = <&pm_sram_code
					&pm_sram_data>;
			};
		};

		target-module@49000000 {
			compatible = "ti,sysc-omap4", "ti,sysc";
@@ -501,10 +503,19 @@
			};
		};

		ocmcram: sram@40300000 {
		target-module@40300000 {
			compatible = "ti,sysc-omap4-simple", "ti,sysc";
			clocks = <&l3_clkctrl AM4_L3_OCMCRAM_CLKCTRL 0>;
			clock-names = "fck";
			ti,no-idle;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0 0x40300000 0x40000>;

			ocmcram: sram@0 {
				compatible = "mmio-sram";
			reg = <0x40300000 0x40000>; /* 256k */
			ranges = <0x0 0x40300000 0x40000>;
				reg = <0 0x40000>; /* 256k */
				ranges = <0 0 0x40000>;
				#address-cells = <1>;
				#size-cells = <1>;

@@ -520,6 +531,7 @@
					pool;
				};
			};
		};

		target-module@56000000 {
			compatible = "ti,sysc-omap4", "ti,sysc";
@@ -548,6 +560,12 @@
#include "am43xx-clocks.dtsi"

&prcm {
	prm_mpu: prm@300 {
		compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
		reg = <0x300 0x100>;
		#power-domain-cells = <0>;
	};

	prm_gfx: prm@400 {
		compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
		reg = <0x400 0x100>;
@@ -555,16 +573,36 @@
		#reset-cells = <1>;
	};

	prm_rtc: prm@500 {
		compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
		reg = <0x500 0x100>;
		#power-domain-cells = <0>;
	};

	prm_tamper: prm@600 {
		compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
		reg = <0x600 0x100>;
		#power-domain-cells = <0>;
	};

	prm_cefuse: prm@700 {
		compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
		reg = <0x700 0x100>;
		#power-domain-cells = <0>;
	};

	prm_per: prm@800 {
		compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
		reg = <0x800 0x100>;
		#reset-cells = <1>;
		#power-domain-cells = <0>;
	};

	prm_wkup: prm@2000 {
		compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
		reg = <0x2000 0x100>;
		#reset-cells = <1>;
		#power-domain-cells = <0>;
	};

	prm_device: prm@4000 {
@@ -578,6 +616,9 @@
&timer1_target {
	ti,no-reset-on-init;
	ti,no-idle;
	clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_TIMER1_CLKCTRL 0>,
		 <&l4_wkup_clkctrl AM4_L4_WKUP_L4_WKUP_CLKCTRL 0>;
	clock-names = "fck", "ick";
	timer@0 {
		assigned-clocks = <&timer1_fck>;
		assigned-clock-parents = <&sys_clkin_ck>;
@@ -588,6 +629,9 @@
&timer2_target {
	ti,no-reset-on-init;
	ti,no-idle;
	clocks = <&l4ls_clkctrl AM4_L4LS_TIMER2_CLKCTRL 0>,
		 <&l4ls_clkctrl AM4_L4LS_L4_LS_CLKCTRL 0>;
	clock-names = "fck", "ick";
	timer@0 {
		assigned-clocks = <&timer2_fck>;
		assigned-clock-parents = <&sys_clkin_ck>;
+58 −21
Original line number Diff line number Diff line
&l4_wkup {						/* 0x44c00000 */
	compatible = "ti,am4-l4-wkup", "simple-bus";
	compatible = "ti,am4-l4-wkup", "simple-pm-bus";
	power-domains = <&prm_wkup>;
	clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_L4_WKUP_CLKCTRL 0>;
	clock-names = "fck";
	reg = <0x44c00000 0x800>,
	      <0x44c00800 0x800>,
	      <0x44c01000 0x400>,
@@ -12,7 +15,7 @@
		 <0x00200000 0x44e00000 0x100000>;	/* segment 2 */

	segment@0 {					/* 0x44c00000 */
		compatible = "simple-bus";
		compatible = "simple-pm-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x00000000 0x00000000 0x000800>,	/* ap 0 */
@@ -22,7 +25,7 @@
	};

	segment@100000 {					/* 0x44d00000 */
		compatible = "simple-bus";
		compatible = "simple-pm-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x00000000 0x00100000 0x004000>,	/* ap 4 */
@@ -32,19 +35,25 @@
			 <0x000f0000 0x001f0000 0x010000>;	/* ap 8 */

		target-module@0 {			/* 0x44d00000, ap 4 28.0 */
			compatible = "ti,sysc";
			status = "disabled";
			compatible = "ti,sysc-omap4", "ti,sysc";
			reg = <0x0 0x4>;
			reg-names = "rev";
			clocks = <&l4_wkup_aon_clkctrl AM4_L4_WKUP_AON_WKUP_M3_CLKCTRL 0>;
			clock-names = "fck";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x0 0x0 0x4000>;
		};
			ranges = <0x00000000 0x00000000 0x4000>,
				 <0x00080000 0x00080000 0x2000>;

		target-module@80000 {			/* 0x44d80000, ap 6 10.0 */
			compatible = "ti,sysc";
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x0 0x80000 0x2000>;
			wkup_m3: cpu@0 {
				compatible = "ti,am4372-wkup-m3";
				reg = <0x00000000 0x4000>,
				      <0x00080000 0x2000>;
				reg-names = "umem", "dmem";
				resets = <&prm_wkup 3>;
				reset-names = "rstctrl";
				ti,pm-firmware = "am335x-pm-firmware.elf";
			};
		};

		target-module@f0000 {			/* 0x44df0000, ap 8 58.0 */
@@ -75,7 +84,7 @@
	};

	segment@200000 {					/* 0x44e00000 */
		compatible = "simple-bus";
		compatible = "simple-pm-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x00000000 0x00200000 0x001000>,	/* ap 9 */
@@ -265,6 +274,9 @@
			compatible = "ti,sysc-omap4", "ti,sysc";
			reg = <0x10000 0x4>;
			reg-names = "rev";
			clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_CONTROL_CLKCTRL 0>;
			clock-names = "fck";
			ti,no-idle;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x0 0x10000 0x10000>;
@@ -419,6 +431,7 @@
					<SYSC_IDLE_SMART>,
					<SYSC_IDLE_SMART_WKUP>;
			/* Domains (P, C): rtc_pwrdm, l4_rtc_clkdm */
			power-domains = <&prm_rtc>;
			clocks = <&l4_rtc_clkctrl AM4_L4_RTC_RTC_CLKCTRL 0>;
			clock-names = "fck";
			#address-cells = <1>;
@@ -479,7 +492,10 @@
};

&l4_fast {					/* 0x4a000000 */
	compatible = "ti,am4-l4-fast", "simple-bus";
	compatible = "ti,am4-l4-fast", "simple-pm-bus";
	power-domains = <&prm_per>;
	clocks = <&l3_clkctrl AM4_L3_L4_HS_CLKCTRL 0>;
	clock-names = "fck";
	reg = <0x4a000000 0x800>,
	      <0x4a000800 0x800>,
	      <0x4a001000 0x400>;
@@ -489,7 +505,7 @@
	ranges = <0x00000000 0x4a000000 0x1000000>;	/* segment 0 */

	segment@0 {					/* 0x4a000000 */
		compatible = "simple-bus";
		compatible = "simple-pm-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x00000000 0x00000000 0x000800>,	/* ap 0 */
@@ -594,7 +610,10 @@
};

&l4_per {					/* 0x48000000 */
	compatible = "ti,am4-l4-per", "simple-bus";
	compatible = "ti,am4-l4-per", "simple-pm-bus";
	power-domains = <&prm_per>;
	clocks = <&l4ls_clkctrl AM4_L4LS_L4_LS_CLKCTRL 0>;
	clock-names = "fck";
	reg = <0x48000000 0x800>,
	      <0x48000800 0x800>,
	      <0x48001000 0x400>,
@@ -612,7 +631,7 @@
		 <0x46400000 0x46400000 0x400000>;	/* l3 data port */

	segment@0 {					/* 0x48000000 */
		compatible = "simple-bus";
		compatible = "simple-pm-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x00000000 0x00000000 0x000800>,	/* ap 0 */
@@ -1187,7 +1206,7 @@
	};

	segment@100000 {					/* 0x48100000 */
		compatible = "simple-bus";
		compatible = "simple-pm-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x0008c000 0x0018c000 0x001000>,	/* ap 34 */
@@ -1618,13 +1637,31 @@
	};

	segment@200000 {					/* 0x48200000 */
		compatible = "simple-bus";
		compatible = "simple-pm-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x00000000 0x00200000 0x010000>;

		target-module@0 {
			compatible = "ti,sysc-omap4-simple", "ti,sysc";
			power-domains = <&prm_mpu>;
			clocks = <&mpu_clkctrl AM4_MPU_MPU_CLKCTRL 0>;
			clock-names = "fck";
			ti,no-idle;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0 0 0x10000>;

			mpu@0 {
				compatible = "ti,omap4-mpu";
				pm-sram = <&pm_sram_code
					   &pm_sram_data>;
			};
		};
	};

	segment@300000 {					/* 0x48300000 */
		compatible = "simple-bus";
		compatible = "simple-pm-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x00000000 0x00300000 0x001000>,	/* ap 56 */
+0 −1
Original line number Diff line number Diff line
@@ -78,7 +78,6 @@ config SOC_AM43XX
	select HAVE_ARM_TWD
	select ARM_ERRATA_754322
	select ARM_ERRATA_775420
	select OMAP_HWMOD
	select OMAP_INTERCONNECT
	select ARM_CPU_SUSPEND if PM

+1 −4
Original line number Diff line number Diff line
@@ -23,7 +23,7 @@ obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(hwmod-common) $(secure-common)
obj-$(CONFIG_ARCH_OMAP4) += $(hwmod-common) $(secure-common)
obj-$(CONFIG_SOC_AM33XX) += $(secure-common)
obj-$(CONFIG_SOC_OMAP5)  += $(hwmod-common) $(secure-common)
obj-$(CONFIG_SOC_AM43XX) += $(hwmod-common) $(secure-common)
obj-$(CONFIG_SOC_AM43XX) += $(secure-common)
obj-$(CONFIG_SOC_DRA7XX) += $(hwmod-common) $(secure-common)

ifneq ($(CONFIG_SND_SOC_OMAP_MCBSP),)
@@ -206,9 +206,6 @@ obj-$(CONFIG_SOC_OMAP2430) += omap_hwmod_2xxx_interconnect_data.o
obj-$(CONFIG_SOC_OMAP2430)		+= omap_hwmod_2430_data.o
obj-$(CONFIG_ARCH_OMAP3)		+= omap_hwmod_2xxx_3xxx_ipblock_data.o
obj-$(CONFIG_ARCH_OMAP3)		+= omap_hwmod_3xxx_data.o
obj-$(CONFIG_SOC_AM43XX)		+= omap_hwmod_43xx_data.o
obj-$(CONFIG_SOC_AM43XX)		+= omap_hwmod_33xx_43xx_interconnect_data.o
obj-$(CONFIG_SOC_AM43XX)		+= omap_hwmod_33xx_43xx_ipblock_data.o
obj-$(CONFIG_SOC_TI81XX)		+= omap_hwmod_81xx_data.o
obj-$(CONFIG_ARCH_OMAP4)		+= omap_hwmod_44xx_data.o
obj-$(CONFIG_SOC_OMAP5)			+= omap_hwmod_54xx_data.o
+0 −1
Original line number Diff line number Diff line
@@ -588,7 +588,6 @@ void __init am43xx_init_early(void)
	omap2_prcm_base_init();
	am43xx_powerdomains_init();
	am43xx_clockdomains_init();
	am43xx_hwmod_init();
	omap_hwmod_init_postsetup();
	omap_l2_cache_init();
	omap_clk_soc_init = am43xx_dt_clk_init;
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