Commit e961ab42 authored by Fabrizio Castro's avatar Fabrizio Castro Committed by Simon Horman
Browse files

arm64: dts: renesas: r8a774c0: Add VIN and CSI-2 device nodes 



Add device nodes for VIN4, VIN5 and CSI40 to RZ/G2E (a.k.a. R8A774C0)
SoC specific device tree.

Signed-off-by: default avatarFabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent f0c2aa16

arch/arm64/boot/dts/renesas/r8a774c0.dtsi

+88 −0
Original line number Diff line number Diff line
@@ -1057,6 +1057,62 @@ 
			status = "disabled";

		};



		vin4: video@e6ef4000 {

			compatible = "renesas,vin-r8a774c0";

			reg = <0 0xe6ef4000 0 0x1000>;

			interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 807>;

			power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;

			resets = <&cpg 807>;

			renesas,id = <4>;

			status = "disabled";



			ports {

				#address-cells = <1>;

				#size-cells = <0>;



				port@1 {

					#address-cells = <1>;

					#size-cells = <0>;



					reg = <1>;



					vin4csi40: endpoint@2 {

						reg = <2>;

						remote-endpoint= <&csi40vin4>;

					};

				};

			};

		};



		vin5: video@e6ef5000 {

			compatible = "renesas,vin-r8a774c0";

			reg = <0 0xe6ef5000 0 0x1000>;

			interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 806>;

			power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;

			resets = <&cpg 806>;

			renesas,id = <5>;

			status = "disabled";



			ports {

				#address-cells = <1>;

				#size-cells = <0>;



				port@1 {

					#address-cells = <1>;

					#size-cells = <0>;



					reg = <1>;



					vin5csi40: endpoint@2 {

						reg = <2>;

						remote-endpoint= <&csi40vin5>;

					};

				};

			};

		};



		rcar_sound: sound@ec500000 {

			/*

			 * #sound-dai-cells is required
@@ -1521,6 +1577,38 @@ 
			iommus = <&ipmmu_vi0 9>;

		};



		csi40: csi2@feaa0000 {

			compatible = "renesas,r8a774c0-csi2",

				     "renesas,rcar-gen3-csi2";

			reg = <0 0xfeaa0000 0 0x10000>;

			interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 716>;

			power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;

			resets = <&cpg 716>;

			status = "disabled";



			ports {

				#address-cells = <1>;

				#size-cells = <0>;



				port@1 {

					#address-cells = <1>;

					#size-cells = <0>;



					reg = <1>;



					csi40vin4: endpoint@0 {

						reg = <0>;

						remote-endpoint = <&vin4csi40>;

					};

					csi40vin5: endpoint@1 {

						reg = <1>;

						remote-endpoint = <&vin5csi40>;

					};

				};

			};

		};



		du: display@feb00000 {

			compatible = "renesas,du-r8a774c0";

			reg = <0 0xfeb00000 0 0x80000>;

CRA Git | Maintained and supported by SUSTech CRA and CCSE