Commit e7bb680f authored by Rajendra Nayak's avatar Rajendra Nayak Committed by Bjorn Andersson
Browse files

arm64: dts: qcom: sc7180: Add CPU capacity values 



Specify the relative CPU capacity of all SC7180 cpu cores.

Signed-off-by: default avatarRajendra Nayak <rnayak@codeaurora.org>
Link: https://lore.kernel.org/r/1578393926-5052-2-git-send-email-rnayak@codeaurora.org


Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
parent 71f87316

arch/arm64/boot/dts/qcom/sc7180.dtsi

+8 −0
Original line number Diff line number Diff line
@@ -89,6 +89,7 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x0>;

			enable-method = "psci";

			capacity-dmips-mhz = <1024>;

			dynamic-power-coefficient = <100>;

			next-level-cache = <&L2_0>;

			#cooling-cells = <2>;
@@ -107,6 +108,7 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x100>;

			enable-method = "psci";

			capacity-dmips-mhz = <1024>;

			dynamic-power-coefficient = <100>;

			next-level-cache = <&L2_100>;

			#cooling-cells = <2>;
@@ -122,6 +124,7 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x200>;

			enable-method = "psci";

			capacity-dmips-mhz = <1024>;

			dynamic-power-coefficient = <100>;

			next-level-cache = <&L2_200>;

			#cooling-cells = <2>;
@@ -137,6 +140,7 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x300>;

			enable-method = "psci";

			capacity-dmips-mhz = <1024>;

			dynamic-power-coefficient = <100>;

			next-level-cache = <&L2_300>;

			#cooling-cells = <2>;
@@ -152,6 +156,7 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x400>;

			enable-method = "psci";

			capacity-dmips-mhz = <1024>;

			dynamic-power-coefficient = <100>;

			next-level-cache = <&L2_400>;

			#cooling-cells = <2>;
@@ -167,6 +172,7 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x500>;

			enable-method = "psci";

			capacity-dmips-mhz = <1024>;

			dynamic-power-coefficient = <100>;

			next-level-cache = <&L2_500>;

			#cooling-cells = <2>;
@@ -182,6 +188,7 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x600>;

			enable-method = "psci";

			capacity-dmips-mhz = <1740>;

			dynamic-power-coefficient = <405>;

			next-level-cache = <&L2_600>;

			#cooling-cells = <2>;
@@ -197,6 +204,7 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x700>;

			enable-method = "psci";

			capacity-dmips-mhz = <1740>;

			dynamic-power-coefficient = <405>;

			next-level-cache = <&L2_700>;

			#cooling-cells = <2>;

CRA Git | Maintained and supported by SUSTech CRA and CCSE