Commit 71f87316 authored by Rajendra Nayak's avatar Rajendra Nayak Committed by Bjorn Andersson
Browse files

arm64: dts: qcom: sc7180: Add dynamic CPU power coefficients 



Add dynamic power coefficients for Silver and Gold CPUs on
SC7180 SoC.

Signed-off-by: default avatarRajendra Nayak <rnayak@codeaurora.org>
Link: https://lore.kernel.org/r/1578393926-5052-1-git-send-email-rnayak@codeaurora.org


Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
parent 1e827785

arch/arm64/boot/dts/qcom/sc7180.dtsi

+8 −0
Original line number Diff line number Diff line
@@ -89,6 +89,7 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x0>;

			enable-method = "psci";

			dynamic-power-coefficient = <100>;

			next-level-cache = <&L2_0>;

			#cooling-cells = <2>;

			qcom,freq-domain = <&cpufreq_hw 0>;
@@ -106,6 +107,7 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x100>;

			enable-method = "psci";

			dynamic-power-coefficient = <100>;

			next-level-cache = <&L2_100>;

			#cooling-cells = <2>;

			qcom,freq-domain = <&cpufreq_hw 0>;
@@ -120,6 +122,7 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x200>;

			enable-method = "psci";

			dynamic-power-coefficient = <100>;

			next-level-cache = <&L2_200>;

			#cooling-cells = <2>;

			qcom,freq-domain = <&cpufreq_hw 0>;
@@ -134,6 +137,7 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x300>;

			enable-method = "psci";

			dynamic-power-coefficient = <100>;

			next-level-cache = <&L2_300>;

			#cooling-cells = <2>;

			qcom,freq-domain = <&cpufreq_hw 0>;
@@ -148,6 +152,7 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x400>;

			enable-method = "psci";

			dynamic-power-coefficient = <100>;

			next-level-cache = <&L2_400>;

			#cooling-cells = <2>;

			qcom,freq-domain = <&cpufreq_hw 0>;
@@ -162,6 +167,7 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x500>;

			enable-method = "psci";

			dynamic-power-coefficient = <100>;

			next-level-cache = <&L2_500>;

			#cooling-cells = <2>;

			qcom,freq-domain = <&cpufreq_hw 0>;
@@ -176,6 +182,7 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x600>;

			enable-method = "psci";

			dynamic-power-coefficient = <405>;

			next-level-cache = <&L2_600>;

			#cooling-cells = <2>;

			qcom,freq-domain = <&cpufreq_hw 1>;
@@ -190,6 +197,7 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x700>;

			enable-method = "psci";

			dynamic-power-coefficient = <405>;

			next-level-cache = <&L2_700>;

			#cooling-cells = <2>;

			qcom,freq-domain = <&cpufreq_hw 1>;

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