Commit e5159827 authored by Will Deacon's avatar Will Deacon
Browse files

Merge branches 'for-next/asm' and 'for-next/insn' into for-next/bti 

Merge in dependencies for in-kernel Branch Target Identification support.

* for-next/asm:
  arm64: Disable old style assembly annotations
  arm64: kernel: Convert to modern annotations for assembly functions
  arm64: entry: Refactor and modernise annotation for ret_to_user
  x86/asm: Provide a Kconfig symbol for disabling old assembly annotations
  x86/32: Remove CONFIG_DOUBLEFAULT

* for-next/insn:
  arm64: insn: Report PAC and BTI instructions as skippable
  arm64: insn: Don't assume unrecognized HINTs are skippable
  arm64: insn: Provide a better name for aarch64_insn_is_nop()
  arm64: insn: Add constants for new HINT instruction decode
parents 80e4e561 50479d58 47d67e4d

arch/arm64/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -66,6 +66,7 @@ config ARM64 
	select ARCH_USE_GNU_PROPERTY

	select ARCH_USE_QUEUED_RWLOCKS

	select ARCH_USE_QUEUED_SPINLOCKS

	select ARCH_USE_SYM_ANNOTATIONS

	select ARCH_SUPPORTS_MEMORY_FAILURE

	select ARCH_SUPPORTS_ATOMIC_RMW

	select ARCH_SUPPORTS_INT128 if CC_HAS_INT128 && (GCC_VERSION >= 50000 || CC_IS_CLANG)

arch/arm64/include/asm/insn.h

+27 −3
Original line number Diff line number Diff line
@@ -39,13 +39,37 @@ enum aarch64_insn_encoding_class { 
					 * system instructions */

};



enum aarch64_insn_hint_op {

enum aarch64_insn_hint_cr_op {

	AARCH64_INSN_HINT_NOP	= 0x0 << 5,

	AARCH64_INSN_HINT_YIELD	= 0x1 << 5,

	AARCH64_INSN_HINT_WFE	= 0x2 << 5,

	AARCH64_INSN_HINT_WFI	= 0x3 << 5,

	AARCH64_INSN_HINT_SEV	= 0x4 << 5,

	AARCH64_INSN_HINT_SEVL	= 0x5 << 5,



	AARCH64_INSN_HINT_XPACLRI    = 0x07 << 5,

	AARCH64_INSN_HINT_PACIA_1716 = 0x08 << 5,

	AARCH64_INSN_HINT_PACIB_1716 = 0x0A << 5,

	AARCH64_INSN_HINT_AUTIA_1716 = 0x0C << 5,

	AARCH64_INSN_HINT_AUTIB_1716 = 0x0E << 5,

	AARCH64_INSN_HINT_PACIAZ     = 0x18 << 5,

	AARCH64_INSN_HINT_PACIASP    = 0x19 << 5,

	AARCH64_INSN_HINT_PACIBZ     = 0x1A << 5,

	AARCH64_INSN_HINT_PACIBSP    = 0x1B << 5,

	AARCH64_INSN_HINT_AUTIAZ     = 0x1C << 5,

	AARCH64_INSN_HINT_AUTIASP    = 0x1D << 5,

	AARCH64_INSN_HINT_AUTIBZ     = 0x1E << 5,

	AARCH64_INSN_HINT_AUTIBSP    = 0x1F << 5,



	AARCH64_INSN_HINT_ESB  = 0x10 << 5,

	AARCH64_INSN_HINT_PSB  = 0x11 << 5,

	AARCH64_INSN_HINT_TSB  = 0x12 << 5,

	AARCH64_INSN_HINT_CSDB = 0x14 << 5,



	AARCH64_INSN_HINT_BTI   = 0x20 << 5,

	AARCH64_INSN_HINT_BTIC  = 0x22 << 5,

	AARCH64_INSN_HINT_BTIJ  = 0x24 << 5,

	AARCH64_INSN_HINT_BTIJC = 0x26 << 5,

};



enum aarch64_insn_imm_type {
@@ -344,7 +368,7 @@ __AARCH64_INSN_FUNCS(msr_reg, 0xFFF00000, 0xD5100000) 


#undef	__AARCH64_INSN_FUNCS



bool aarch64_insn_is_nop(u32 insn);

bool aarch64_insn_is_steppable_hint(u32 insn);

bool aarch64_insn_is_branch_imm(u32 insn);



static inline bool aarch64_insn_is_adr_adrp(u32 insn)
@@ -370,7 +394,7 @@ u32 aarch64_insn_gen_comp_branch_imm(unsigned long pc, unsigned long addr, 
				     enum aarch64_insn_branch_type type);

u32 aarch64_insn_gen_cond_branch_imm(unsigned long pc, unsigned long addr,

				     enum aarch64_insn_condition cond);

u32 aarch64_insn_gen_hint(enum aarch64_insn_hint_op op);

u32 aarch64_insn_gen_hint(enum aarch64_insn_hint_cr_op op);

u32 aarch64_insn_gen_nop(void);

u32 aarch64_insn_gen_branch_reg(enum aarch64_insn_register reg,

				enum aarch64_insn_branch_type type);

arch/arm64/kernel/cpu-reset.S

+2 −2
Original line number Diff line number Diff line
@@ -29,7 +29,7 @@ 
 * branch to what would be the reset vector. It must be executed with the

 * flat identity mapping.

 */

ENTRY(__cpu_soft_restart)

SYM_CODE_START(__cpu_soft_restart)

	/* Clear sctlr_el1 flags. */

	mrs	x12, sctlr_el1

	mov_q	x13, SCTLR_ELx_FLAGS
@@ -47,6 +47,6 @@ ENTRY(__cpu_soft_restart) 
	mov	x1, x3				// arg1

	mov	x2, x4				// arg2

	br	x8

ENDPROC(__cpu_soft_restart)

SYM_CODE_END(__cpu_soft_restart)



.popsection

arch/arm64/kernel/efi-rt-wrapper.S

+2 −2
Original line number Diff line number Diff line
@@ -5,7 +5,7 @@ 


#include <linux/linkage.h>



ENTRY(__efi_rt_asm_wrapper)

SYM_FUNC_START(__efi_rt_asm_wrapper)

	stp	x29, x30, [sp, #-32]!

	mov	x29, sp
@@ -35,4 +35,4 @@ ENTRY(__efi_rt_asm_wrapper) 
	b.ne	0f

	ret

0:	b	efi_handle_corrupted_x18	// tail call

ENDPROC(__efi_rt_asm_wrapper)
 
SYM_FUNC_END(__efi_rt_asm_wrapper)

arch/arm64/kernel/entry-fpsimd.S

+10 −10
Original line number Diff line number Diff line
@@ -16,34 +16,34 @@ 
 *

 * x0 - pointer to struct fpsimd_state

 */

ENTRY(fpsimd_save_state)

SYM_FUNC_START(fpsimd_save_state)

	fpsimd_save x0, 8

	ret

ENDPROC(fpsimd_save_state)

SYM_FUNC_END(fpsimd_save_state)



/*

 * Load the FP registers.

 *

 * x0 - pointer to struct fpsimd_state

 */

ENTRY(fpsimd_load_state)

SYM_FUNC_START(fpsimd_load_state)

	fpsimd_restore x0, 8

	ret

ENDPROC(fpsimd_load_state)

SYM_FUNC_END(fpsimd_load_state)



#ifdef CONFIG_ARM64_SVE

ENTRY(sve_save_state)

SYM_FUNC_START(sve_save_state)

	sve_save 0, x1, 2

	ret

ENDPROC(sve_save_state)

SYM_FUNC_END(sve_save_state)



ENTRY(sve_load_state)

SYM_FUNC_START(sve_load_state)

	sve_load 0, x1, x2, 3, x4

	ret

ENDPROC(sve_load_state)

SYM_FUNC_END(sve_load_state)



ENTRY(sve_get_vl)

SYM_FUNC_START(sve_get_vl)

	_sve_rdvl	0, 1

	ret

ENDPROC(sve_get_vl)

SYM_FUNC_END(sve_get_vl)

#endif /* CONFIG_ARM64_SVE */

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