Commit e3aea296 authored by Vladimir Oltean's avatar Vladimir Oltean Committed by David S. Miller
Browse files

net: mscc: ocelot: add definitions for VCAP ES0 keys, actions and target 



As a preparation step for the offloading to ES0, let's create the
infrastructure for talking with this hardware block.

Signed-off-by: default avatarVladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent a61e365d

arch/mips/boot/dts/mscc/ocelot.dtsi

+2 −1
Original line number Diff line number Diff line
@@ -134,12 +134,13 @@ 
			      <0x1280000 0x100>,

			      <0x1800000 0x80000>,

			      <0x1880000 0x10000>,

			      <0x1040000 0x10000>,

			      <0x1050000 0x10000>,

			      <0x1060000 0x10000>;

			reg-names = "sys", "rew", "qs", "ptp", "port0", "port1",

				    "port2", "port3", "port4", "port5", "port6",

				    "port7", "port8", "port9", "port10", "qsys",

				    "ana", "s1", "s2";

				    "ana", "s0", "s1", "s2";

			interrupts = <18 21 22>;

			interrupt-names = "ptp_rdy", "xtr", "inj";

drivers/net/dsa/ocelot/felix_vsc9959.c

+50 −0
Original line number Diff line number Diff line
@@ -361,6 +361,7 @@ static const u32 *vsc9959_regmap[TARGET_MAX] = { 
	[QSYS]	= vsc9959_qsys_regmap,

	[REW]	= vsc9959_rew_regmap,

	[SYS]	= vsc9959_sys_regmap,

	[S0]	= vsc9959_vcap_regmap,

	[S1]	= vsc9959_vcap_regmap,

	[S2]	= vsc9959_vcap_regmap,

	[PTP]	= vsc9959_ptp_regmap,
@@ -395,6 +396,11 @@ static const struct resource vsc9959_target_io_res[TARGET_MAX] = { 
		.end	= 0x001ffff,

		.name	= "sys",

	},

	[S0] = {

		.start	= 0x0040000,

		.end	= 0x00403ff,

		.name	= "s0",

	},

	[S1] = {

		.start	= 0x0050000,

		.end	= 0x00503ff,
@@ -604,6 +610,38 @@ static const struct ocelot_stat_layout vsc9959_stats_layout[] = { 
	{ .offset = 0x111,	.name = "drop_green_prio_7", },

};



static const struct vcap_field vsc9959_vcap_es0_keys[] = {

	[VCAP_ES0_EGR_PORT]			= {  0,  3},

	[VCAP_ES0_IGR_PORT]			= {  3,  3},

	[VCAP_ES0_RSV]				= {  6,  2},

	[VCAP_ES0_L2_MC]			= {  8,  1},

	[VCAP_ES0_L2_BC]			= {  9,  1},

	[VCAP_ES0_VID]				= { 10, 12},

	[VCAP_ES0_DP]				= { 22,  1},

	[VCAP_ES0_PCP]				= { 23,  3},

};



static const struct vcap_field vsc9959_vcap_es0_actions[] = {

	[VCAP_ES0_ACT_PUSH_OUTER_TAG]		= {  0,  2},

	[VCAP_ES0_ACT_PUSH_INNER_TAG]		= {  2,  1},

	[VCAP_ES0_ACT_TAG_A_TPID_SEL]		= {  3,  2},

	[VCAP_ES0_ACT_TAG_A_VID_SEL]		= {  5,  1},

	[VCAP_ES0_ACT_TAG_A_PCP_SEL]		= {  6,  2},

	[VCAP_ES0_ACT_TAG_A_DEI_SEL]		= {  8,  2},

	[VCAP_ES0_ACT_TAG_B_TPID_SEL]		= { 10,  2},

	[VCAP_ES0_ACT_TAG_B_VID_SEL]		= { 12,  1},

	[VCAP_ES0_ACT_TAG_B_PCP_SEL]		= { 13,  2},

	[VCAP_ES0_ACT_TAG_B_DEI_SEL]		= { 15,  2},

	[VCAP_ES0_ACT_VID_A_VAL]		= { 17, 12},

	[VCAP_ES0_ACT_PCP_A_VAL]		= { 29,  3},

	[VCAP_ES0_ACT_DEI_A_VAL]		= { 32,  1},

	[VCAP_ES0_ACT_VID_B_VAL]		= { 33, 12},

	[VCAP_ES0_ACT_PCP_B_VAL]		= { 45,  3},

	[VCAP_ES0_ACT_DEI_B_VAL]		= { 48,  1},

	[VCAP_ES0_ACT_RSV]			= { 49, 23},

	[VCAP_ES0_ACT_HIT_STICKY]		= { 72,  1},

};



static const struct vcap_field vsc9959_vcap_is1_keys[] = {

	[VCAP_IS1_HK_TYPE]			= {  0,   1},

	[VCAP_IS1_HK_LOOKUP]			= {  1,   2},
@@ -777,6 +815,18 @@ static struct vcap_field vsc9959_vcap_is2_actions[] = { 
};



static const struct vcap_props vsc9959_vcap_props[] = {

	[VCAP_ES0] = {

		.action_type_width = 0,

		.action_table = {

			[ES0_ACTION_TYPE_NORMAL] = {

				.width = 72, /* HIT_STICKY not included */

				.count = 1,

			},

		},

		.target = S0,

		.keys = vsc9959_vcap_es0_keys,

		.actions = vsc9959_vcap_es0_actions,

	},

	[VCAP_IS1] = {

		.action_type_width = 0,

		.action_table = {

drivers/net/dsa/ocelot/seville_vsc9953.c

+50 −0
Original line number Diff line number Diff line
@@ -354,6 +354,7 @@ static const u32 *vsc9953_regmap[TARGET_MAX] = { 
	[QSYS]		= vsc9953_qsys_regmap,

	[REW]		= vsc9953_rew_regmap,

	[SYS]		= vsc9953_sys_regmap,

	[S0]		= vsc9953_vcap_regmap,

	[S1]		= vsc9953_vcap_regmap,

	[S2]		= vsc9953_vcap_regmap,

	[GCB]		= vsc9953_gcb_regmap,
@@ -387,6 +388,11 @@ static const struct resource vsc9953_target_io_res[TARGET_MAX] = { 
		.end	= 0x001ffff,

		.name	= "sys",

	},

	[S0] = {

		.start	= 0x0040000,

		.end	= 0x00403ff,

		.name	= "s0",

	},

	[S1] = {

		.start	= 0x0050000,

		.end	= 0x00503ff,
@@ -607,6 +613,38 @@ static const struct ocelot_stat_layout vsc9953_stats_layout[] = { 
	{ .offset = 0x91,	.name = "drop_green_prio_7", },

};



static const struct vcap_field vsc9953_vcap_es0_keys[] = {

	[VCAP_ES0_EGR_PORT]			= {  0,  4},

	[VCAP_ES0_IGR_PORT]			= {  4,  4},

	[VCAP_ES0_RSV]				= {  8,  2},

	[VCAP_ES0_L2_MC]			= { 10,  1},

	[VCAP_ES0_L2_BC]			= { 11,  1},

	[VCAP_ES0_VID]				= { 12, 12},

	[VCAP_ES0_DP]				= { 24,  1},

	[VCAP_ES0_PCP]				= { 25,  3},

};



static const struct vcap_field vsc9953_vcap_es0_actions[] = {

	[VCAP_ES0_ACT_PUSH_OUTER_TAG]		= {  0,  2},

	[VCAP_ES0_ACT_PUSH_INNER_TAG]		= {  2,  1},

	[VCAP_ES0_ACT_TAG_A_TPID_SEL]		= {  3,  2},

	[VCAP_ES0_ACT_TAG_A_VID_SEL]		= {  5,  1},

	[VCAP_ES0_ACT_TAG_A_PCP_SEL]		= {  6,  2},

	[VCAP_ES0_ACT_TAG_A_DEI_SEL]		= {  8,  2},

	[VCAP_ES0_ACT_TAG_B_TPID_SEL]		= { 10,  2},

	[VCAP_ES0_ACT_TAG_B_VID_SEL]		= { 12,  1},

	[VCAP_ES0_ACT_TAG_B_PCP_SEL]		= { 13,  2},

	[VCAP_ES0_ACT_TAG_B_DEI_SEL]		= { 15,  2},

	[VCAP_ES0_ACT_VID_A_VAL]		= { 17, 12},

	[VCAP_ES0_ACT_PCP_A_VAL]		= { 29,  3},

	[VCAP_ES0_ACT_DEI_A_VAL]		= { 32,  1},

	[VCAP_ES0_ACT_VID_B_VAL]		= { 33, 12},

	[VCAP_ES0_ACT_PCP_B_VAL]		= { 45,  3},

	[VCAP_ES0_ACT_DEI_B_VAL]		= { 48,  1},

	[VCAP_ES0_ACT_RSV]			= { 49, 24},

	[VCAP_ES0_ACT_HIT_STICKY]		= { 73,  1},

};



static const struct vcap_field vsc9953_vcap_is1_keys[] = {

	[VCAP_IS1_HK_TYPE]			= {  0,   1},

	[VCAP_IS1_HK_LOOKUP]			= {  1,   2},
@@ -767,6 +805,18 @@ static struct vcap_field vsc9953_vcap_is2_actions[] = { 
};



static const struct vcap_props vsc9953_vcap_props[] = {

	[VCAP_ES0] = {

		.action_type_width = 0,

		.action_table = {

			[ES0_ACTION_TYPE_NORMAL] = {

				.width = 73, /* HIT_STICKY not included */

				.count = 1,

			},

		},

		.target = S0,

		.keys = vsc9953_vcap_es0_keys,

		.actions = vsc9953_vcap_es0_actions,

	},

	[VCAP_IS1] = {

		.action_type_width = 0,

		.action_table = {

drivers/net/ethernet/mscc/ocelot_vsc7514.c

+45 −0
Original line number Diff line number Diff line
@@ -758,6 +758,38 @@ static const struct ocelot_ops ocelot_ops = { 
	.wm_enc			= ocelot_wm_enc,

};



static const struct vcap_field vsc7514_vcap_es0_keys[] = {

	[VCAP_ES0_EGR_PORT]			= {  0,  4},

	[VCAP_ES0_IGR_PORT]			= {  4,  4},

	[VCAP_ES0_RSV]				= {  8,  2},

	[VCAP_ES0_L2_MC]			= { 10,  1},

	[VCAP_ES0_L2_BC]			= { 11,  1},

	[VCAP_ES0_VID]				= { 12, 12},

	[VCAP_ES0_DP]				= { 24,  1},

	[VCAP_ES0_PCP]				= { 25,  3},

};



static const struct vcap_field vsc7514_vcap_es0_actions[] = {

	[VCAP_ES0_ACT_PUSH_OUTER_TAG]		= {  0,  2},

	[VCAP_ES0_ACT_PUSH_INNER_TAG]		= {  2,  1},

	[VCAP_ES0_ACT_TAG_A_TPID_SEL]		= {  3,  2},

	[VCAP_ES0_ACT_TAG_A_VID_SEL]		= {  5,  1},

	[VCAP_ES0_ACT_TAG_A_PCP_SEL]		= {  6,  2},

	[VCAP_ES0_ACT_TAG_A_DEI_SEL]		= {  8,  2},

	[VCAP_ES0_ACT_TAG_B_TPID_SEL]		= { 10,  2},

	[VCAP_ES0_ACT_TAG_B_VID_SEL]		= { 12,  1},

	[VCAP_ES0_ACT_TAG_B_PCP_SEL]		= { 13,  2},

	[VCAP_ES0_ACT_TAG_B_DEI_SEL]		= { 15,  2},

	[VCAP_ES0_ACT_VID_A_VAL]		= { 17, 12},

	[VCAP_ES0_ACT_PCP_A_VAL]		= { 29,  3},

	[VCAP_ES0_ACT_DEI_A_VAL]		= { 32,  1},

	[VCAP_ES0_ACT_VID_B_VAL]		= { 33, 12},

	[VCAP_ES0_ACT_PCP_B_VAL]		= { 45,  3},

	[VCAP_ES0_ACT_DEI_B_VAL]		= { 48,  1},

	[VCAP_ES0_ACT_RSV]			= { 49, 24},

	[VCAP_ES0_ACT_HIT_STICKY]		= { 73,  1},

};



static const struct vcap_field vsc7514_vcap_is1_keys[] = {

	[VCAP_IS1_HK_TYPE]			= {  0,   1},

	[VCAP_IS1_HK_LOOKUP]			= {  1,   2},
@@ -932,6 +964,18 @@ static const struct vcap_field vsc7514_vcap_is2_actions[] = { 
};



static const struct vcap_props vsc7514_vcap_props[] = {

	[VCAP_ES0] = {

		.action_type_width = 0,

		.action_table = {

			[ES0_ACTION_TYPE_NORMAL] = {

				.width = 73, /* HIT_STICKY not included */

				.count = 1,

			},

		},

		.target = S0,

		.keys = vsc7514_vcap_es0_keys,

		.actions = vsc7514_vcap_es0_actions,

	},

	[VCAP_IS1] = {

		.action_type_width = 0,

		.action_table = {
@@ -1129,6 +1173,7 @@ static int mscc_ocelot_probe(struct platform_device *pdev) 
		{ QSYS, "qsys" },

		{ ANA, "ana" },

		{ QS, "qs" },

		{ S0, "s0" },

		{ S1, "s1" },

		{ S2, "s2" },

		{ PTP, "ptp", 1 },

include/soc/mscc/ocelot.h

+1 −0
Original line number Diff line number Diff line
@@ -123,6 +123,7 @@ enum ocelot_target { 
	QSYS,

	REW,

	SYS,

	S0,

	S1,

	S2,

	HSIO,

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