Commit e2fc49e1 authored by Michal Simek's avatar Michal Simek
Browse files

arm64: zynqmp: Add support for Xilinx zc1751 



Xilinx zc1751 boards is used for silicon validation. Board can be
extended with 5 FMCs/DCs cards to connect various IPs. Describe all
these combinations.

Signed-off-by: default avatarMichal Simek <michal.simek@xilinx.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
parent d665c743

Documentation/devicetree/bindings/arm/xilinx.txt

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@@ -28,6 +28,9 @@ Additional compatible strings: 
- Xilinx internal board zc1275

  "xlnx,zynqmp-zc1275-revA", "xlnx,zynqmp-zc1275"



- Xilinx internal board zc1751

  "xlnx,zynqmp-zc1751"



- Xilinx 96boards compatible board zcu100

  "xlnx,zynqmp-zcu100-revC", "xlnx,zynqmp-zcu100"

arch/arm64/boot/dts/xilinx/Makefile

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@@ -3,6 +3,11 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-ep108.dtb 
dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zc1232-revA.dtb

dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zc1254-revA.dtb

dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zc1275-revA.dtb

dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zc1751-xm015-dc1.dtb

dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zc1751-xm016-dc2.dtb

dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zc1751-xm017-dc3.dtb

dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zc1751-xm018-dc4.dtb

dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zc1751-xm019-dc5.dtb

dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu100-revC.dtb

dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu102-revA.dtb

dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu102-revB.dtb

arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts

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// SPDX-License-Identifier: GPL-2.0+

/*

 * dts file for Xilinx ZynqMP zc1751-xm015-dc1

 *

 * (C) Copyright 2015 - 2018, Xilinx, Inc.

 *

 * Michal Simek <michal.simek@xilinx.com>

 */



/dts-v1/;



#include "zynqmp.dtsi"

#include "zynqmp-clk.dtsi"

#include <dt-bindings/gpio/gpio.h>



/ {

	model = "ZynqMP zc1751-xm015-dc1 RevA";

	compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp";



	aliases {

		ethernet0 = &gem3;

		i2c0 = &i2c1;

		mmc0 = &sdhci0;

		mmc1 = &sdhci1;

		rtc0 = &rtc;

		serial0 = &uart0;

	};



	chosen {

		bootargs = "earlycon";

		stdout-path = "serial0:115200n8";

	};



	memory@0 {

		device_type = "memory";

		reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;

	};

};



&fpd_dma_chan1 {

	status = "okay";

};



&fpd_dma_chan2 {

	status = "okay";

};



&fpd_dma_chan3 {

	status = "okay";

};



&fpd_dma_chan4 {

	status = "okay";

};



&fpd_dma_chan5 {

	status = "okay";

};



&fpd_dma_chan6 {

	status = "okay";

};



&fpd_dma_chan7 {

	status = "okay";

};



&fpd_dma_chan8 {

	status = "okay";

};



&gem3 {

	status = "okay";

	phy-handle = <&phy0>;

	phy-mode = "rgmii-id";

	phy0: phy@0 {

		reg = <0>;

	};

};



&gpio {

	status = "okay";

};





&i2c1 {

	status = "okay";

	clock-frequency = <400000>;



	eeprom: eeprom@55 {

		compatible = "atmel,24c64"; /* 24AA64 */

		reg = <0x55>;

	};

};



&rtc {

	status = "okay";

};



&sata {

	status = "okay";

	/* SATA phy OOB timing settings */

	ceva,p0-cominit-params = /bits/ 8 <0x1B 0x4D 0x18 0x28>;

	ceva,p0-comwake-params = /bits/ 8 <0x06 0x19 0x08 0x0E>;

	ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;

	ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>;

	ceva,p1-cominit-params = /bits/ 8 <0x1B 0x4D 0x18 0x28>;

	ceva,p1-comwake-params = /bits/ 8 <0x06 0x19 0x08 0x0E>;

	ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;

	ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;

};



/* eMMC */

&sdhci0 {

	status = "okay";

	bus-width = <8>;

};



/* SD1 with level shifter */

&sdhci1 {

	status = "okay";

};



&uart0 {

	status = "okay";

};



/* ULPI SMSC USB3320 */

&usb0 {

	status = "okay";

};

arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dts

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// SPDX-License-Identifier: GPL-2.0+

/*

 * dts file for Xilinx ZynqMP zc1751-xm016-dc2

 *

 * (C) Copyright 2015 - 2018, Xilinx, Inc.

 *

 * Michal Simek <michal.simek@xilinx.com>

 */



/dts-v1/;



#include "zynqmp.dtsi"

#include "zynqmp-clk.dtsi"

#include <dt-bindings/gpio/gpio.h>



/ {

	model = "ZynqMP zc1751-xm016-dc2 RevA";

	compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp";



	aliases {

		can0 = &can0;

		can1 = &can1;

		ethernet0 = &gem2;

		i2c0 = &i2c0;

		rtc0 = &rtc;

		serial0 = &uart0;

		serial1 = &uart1;

		spi0 = &spi0;

		spi1 = &spi1;

	};



	chosen {

		bootargs = "earlycon";

		stdout-path = "serial0:115200n8";

	};



	memory@0 {

		device_type = "memory";

		reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;

	};

};



&can0 {

	status = "okay";

};



&can1 {

	status = "okay";

};



&fpd_dma_chan1 {

	status = "okay";

};



&fpd_dma_chan2 {

	status = "okay";

};



&fpd_dma_chan3 {

	status = "okay";

};



&fpd_dma_chan4 {

	status = "okay";

};



&fpd_dma_chan5 {

	status = "okay";

};



&fpd_dma_chan6 {

	status = "okay";

};



&fpd_dma_chan7 {

	status = "okay";

};



&fpd_dma_chan8 {

	status = "okay";

};



&gem2 {

	status = "okay";

	phy-handle = <&phy0>;

	phy-mode = "rgmii-id";

	phy0: phy@5 {

		reg = <5>;

		ti,rx-internal-delay = <0x8>;

		ti,tx-internal-delay = <0xa>;

		ti,fifo-depth = <0x1>;

	};

};



&gpio {

	status = "okay";

};



&i2c0 {

	status = "okay";

	clock-frequency = <400000>;



	tca6416_u26: gpio@20 {

		compatible = "ti,tca6416";

		reg = <0x20>;

		gpio-controller;

		#gpio-cells = <2>;

		/* IRQ not connected */

	};



	rtc@68 {

		compatible = "dallas,ds1339";

		reg = <0x68>;

	};

};



&rtc {

	status = "okay";

};



&spi0 {

	status = "okay";

	num-cs = <1>;



	spi0_flash0: flash0@0 {

		#address-cells = <1>;

		#size-cells = <1>;

		compatible = "sst,sst25wf080", "jedec,spi-nor";

		spi-max-frequency = <50000000>;

		reg = <0>;



		partition@0 {

			label = "data";

			reg = <0x0 0x100000>;

		};

	};

};



&spi1 {

	status = "okay";

	num-cs = <1>;



	spi1_flash0: flash0@0 {

		#address-cells = <1>;

		#size-cells = <1>;

		compatible = "atmel,at45db041e", "atmel,at45", "atmel,dataflash";

		spi-max-frequency = <20000000>;

		reg = <0>;



		partition@0 {

			label = "data";

			reg = <0x0 0x84000>;

		};

	};

};



/* ULPI SMSC USB3320 */

&usb1 {

	status = "okay";

};



&uart0 {

	status = "okay";

};



&uart1 {

	status = "okay";

};

arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dts

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// SPDX-License-Identifier: GPL-2.0+

/*

 * dts file for Xilinx ZynqMP zc1751-xm017-dc3

 *

 * (C) Copyright 2016 - 2018, Xilinx, Inc.

 *

 * Michal Simek <michal.simek@xilinx.com>

 */



/dts-v1/;



#include "zynqmp.dtsi"

#include "zynqmp-clk.dtsi"



/ {

	model = "ZynqMP zc1751-xm017-dc3 RevA";

	compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp";



	aliases {

		ethernet0 = &gem0;

		i2c0 = &i2c0;

		i2c1 = &i2c1;

		mmc0 = &sdhci1;

		rtc0 = &rtc;

		serial0 = &uart0;

		serial1 = &uart1;

	};



	chosen {

		bootargs = "earlycon";

		stdout-path = "serial0:115200n8";

	};



	memory@0 {

		device_type = "memory";

		reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;

	};

};



&fpd_dma_chan1 {

	status = "okay";

};



&fpd_dma_chan2 {

	status = "okay";

};



&fpd_dma_chan3 {

	status = "okay";

};



&fpd_dma_chan4 {

	status = "okay";

};



&fpd_dma_chan5 {

	status = "okay";

};



&fpd_dma_chan6 {

	status = "okay";

};



&fpd_dma_chan7 {

	status = "okay";

};



&fpd_dma_chan8 {

	status = "okay";

};



&gem0 {

	status = "okay";

	phy-handle = <&phy0>;

	phy-mode = "rgmii-id";

	phy0: phy@0 { /* VSC8211 */

		reg = <0>;

	};

};



&gpio {

	status = "okay";

};



/* just eeprom here */

&i2c0 {

	status = "okay";

	clock-frequency = <400000>;



	tca6416_u26: gpio@20 {

		compatible = "ti,tca6416";

		reg = <0x20>;

		gpio-controller;

		#gpio-cells = <2>;

		/* IRQ not connected */

	};



	rtc@68 {

		compatible = "dallas,ds1339";

		reg = <0x68>;

	};

};



/* eeprom24c02 and SE98A temp chip pca9306 */

&i2c1 {

	status = "okay";

	clock-frequency = <400000>;

};



&rtc {

	status = "okay";

};



&sata {

	status = "okay";

	/* SATA phy OOB timing settings */

	ceva,p0-cominit-params = /bits/ 8 <0x1B 0x4D 0x18 0x28>;

	ceva,p0-comwake-params = /bits/ 8 <0x06 0x19 0x08 0x0E>;

	ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;

	ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>;

	ceva,p1-cominit-params = /bits/ 8 <0x1B 0x4D 0x18 0x28>;

	ceva,p1-comwake-params = /bits/ 8 <0x06 0x19 0x08 0x0E>;

	ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;

	ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;

};



&sdhci1 { /* emmc with some settings */

	status = "okay";

};



/* main */

&uart0 {

	status = "okay";

};



/* DB9 */

&uart1 {

	status = "okay";

};



&usb0 {

	status = "okay";

	dr_mode = "host";

};



/* ULPI SMSC USB3320 */

&usb1 {

	status = "okay";

	dr_mode = "host";

};

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