Commit e25f9152 authored Nov 08, 2019 by Brett Creeley Committed by Jeff Kirsher Nov 22, 2019

ice: Fix setting coalesce to handle DCB configuration

Currently there can be a case where a DCB map is applied and there are
more interrupt vectors (vsi->num_q_vectors) than Rx queues (vsi->num_rxq)
and Tx queues (vsi->num_txq). If we try to set coalesce settings in this
case it will report a false failure. Fix this by checking if vector index
is valid with respect to the number of Tx and Rx queues configured.

Signed-off-by: Brett Creeley <brett.creeley@intel.com>
Tested-by: Andrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>

parent 1f9639d2

drivers/net/ethernet/intel/ice/ice_ethtool.c

+10 −3

Original line number	Diff line number	Diff line
		@@ -3420,10 +3420,17 @@ __ice_set_coalesce(struct net_device netdev, struct ethtool_coalesce ec,
		struct ice_vsi *vsi = np->vsi;

		if (q_num < 0) {
		int i;
		int v_idx;

		ice_for_each_q_vector(vsi, v_idx) {
		/* In some cases if DCB is configured the num_[rx\|tx]q
		* can be less than vsi->num_q_vectors. This check
		* accounts for that so we don't report a false failure
		*/
		if (v_idx >= vsi->num_rxq && v_idx >= vsi->num_txq)
		goto set_complete;

		ice_for_each_q_vector(vsi, i) {
		if (ice_set_q_coalesce(vsi, ec, i))
		if (ice_set_q_coalesce(vsi, ec, v_idx))
		return -EINVAL;
		}
		goto set_complete;

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