ARM: dts: r7s9210: Add IRQC device node (e23391f3) · Commits · 戴 / test

Enable support for the IRQC on RZ/A2M, which is a small front-end to the GIC. This allows to use up to 8 external interrupts with configurable sense select. Signed-off-by:

Chris Brandt <chris.brandt@renesas.com> Reviewed-by:

Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by:

Simon Horman <horms+renesas@verge.net.au>

arch/arm/boot/dts/r7s9210.dtsi

+19 −0

Original line number	Diff line number	Diff line
		@@ -473,6 +473,25 @@
		reg = <0xfcfe8004 4>;
		};

		irqc: interrupt-controller@fcfef800 {
		compatible = "renesas,r7s9210-irqc",
		"renesas,rza1-irqc";
		#interrupt-cells = <2>;
		#address-cells = <0>;
		interrupt-controller;
		reg = <0xfcfef800 0x6>;
		interrupt-map =
		<0 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
		<1 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
		<2 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
		<3 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
		<4 0 &gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
		<5 0 &gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
		<6 0 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
		<7 0 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-map-mask = <7 0>;
		};

		pinctrl: pin-controller@fcffe000 {
		compatible = "renesas,r7s9210-pinctrl";
		reg = <0xfcffe000 0x1000>;

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