Commit 1de78ccb authored by Yoshihiro Kaneko's avatar Yoshihiro Kaneko Committed by Simon Horman
Browse files

ARM: dts: rza2mevb: sort nodes of rza2mevb board 



This patch sorts the nodes of arch/arm/boot/dts/r7s9210-rza2mevb.dts.

* Sort subnodes of root ("/") node alphabetically
* Sort following top-level nodes alphabetically
* Sort subnodes of pinctrl alphabetically

Signed-off-by: default avatarYoshihiro Kaneko <ykaneko0929@gmail.com>
[simon: rebase and sort new ehci nodes]
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 07d2bf96

arch/arm/boot/dts/r7s9210-rza2mevb.dts

+52 −52
Original line number Diff line number Diff line
@@ -26,11 +26,6 @@ 
		stdout-path = "serial0:115200n8";

	};



	memory@40000000 {

		device_type = "memory";

		reg = <0x40000000 0x00800000>;	 /* HyperRAM */

	};



	lbsc {

		#address-cells = <1>;

		#size-cells = <1>;
@@ -46,6 +41,41 @@ 
			gpios = <&pinctrl RZA2_PIN(PORTC, 1) GPIO_ACTIVE_HIGH>;

		};

	};



	memory@40000000 {

		device_type = "memory";

		reg = <0x40000000 0x00800000>;	 /* HyperRAM */

	};

};



&ehci0 {

	status = "okay";

};



&ehci1 {

	status = "okay";

};



&ether0 {

	pinctrl-names = "default";

	pinctrl-0 = <&eth0_pins>;

	status = "okay";

	renesas,no-ether-link;

	phy-handle = <&phy0>;

	phy0: ethernet-phy@0 {

		reg = <0>;

	};

};



&ether1 {

	pinctrl-names = "default";

	pinctrl-0 = <&eth1_pins>;

	status = "okay";

	renesas,no-ether-link;

	phy-handle = <&phy1>;

	phy1: ethernet-phy@1 {

		reg = <0>;

	};

};



/* EXTAL */
@@ -53,23 +83,16 @@ 
	clock-frequency = <24000000>;	/* 24MHz */

};



/* RTC_X1 */

&rtc_x1_clk {

	clock-frequency = <32768>;

/* High resolution System tick timers */

&ostm0 {

	status = "okay";

};



/* USB_X1 */

&usb_x1_clk {

	clock-frequency = <48000000>;

&ostm1 {

	status = "okay";

};



&pinctrl {

	/* Serial Console */

	scif4_pins: serial4 {

		pinmux = <RZA2_PINMUX(PORT9, 0, 4)>,	/* TxD4 */

			 <RZA2_PINMUX(PORT9, 1, 4)>;	/* RxD4 */

	};



	eth0_pins: eth0 {

		pinmux = <RZA2_PINMUX(PORTE, 0, 7)>, /* REF50CK0 */

			 <RZA2_PINMUX(PORT6, 1, 7)>, /* RMMI0_TXDEN */
@@ -98,6 +121,12 @@ 
			 <RZA2_PINMUX(PORTL, 1, 5)>; /* IRQ5 */

	};



	/* Serial Console */

	scif4_pins: serial4 {

		pinmux = <RZA2_PINMUX(PORT9, 0, 4)>,	/* TxD4 */

			 <RZA2_PINMUX(PORT9, 1, 4)>;	/* RxD4 */

	};



	sdhi0_pins: sdhi0 {

		pinmux = <RZA2_PINMUX(PORT5, 0, 3)>,	/* SD0_CD */

			 <RZA2_PINMUX(PORT5, 1, 3)>;	/* SD0_WP */
@@ -121,13 +150,9 @@ 
	};

};



/* High resolution System tick timers */

&ostm0 {

	status = "okay";

};



&ostm1 {

	status = "okay";

/* RTC_X1 */

&rtc_x1_clk {

	clock-frequency = <32768>;

};



/* Serial Console */
@@ -138,28 +163,6 @@ 
	status = "okay";

};



&ether0 {

	pinctrl-names = "default";

	pinctrl-0 = <&eth0_pins>;

	status = "okay";

	renesas,no-ether-link;

	phy-handle = <&phy0>;

	phy0: ethernet-phy@0 {

		reg = <0>;

	};

};



&ether1 {

	pinctrl-names = "default";

	pinctrl-0 = <&eth1_pins>;

	status = "okay";

	renesas,no-ether-link;

	phy-handle = <&phy1>;

	phy1: ethernet-phy@1 {

		reg = <0>;

	};

};



&sdhi0 {

	pinctrl-names = "default";

	pinctrl-0 = <&sdhi0_pins>;
@@ -182,10 +185,6 @@ 
	status = "okay";

};



&ehci0 {

	status = "okay";

};



/* USB-1 as Host */

&usb2_phy1 {

	pinctrl-names = "default";
@@ -194,6 +193,7 @@ 
	status = "okay";

};



&ehci1 {

	status = "okay";

/* USB_X1 */

&usb_x1_clk {

	clock-frequency = <48000000>;

};

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