Commit dd980900 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'imx-dt64-4.21' of... 

Merge tag 'imx-dt64-4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt

Freescale arm64 device tree update for 4.21:
 - Add device tree for LS1028A SoC and NXP FRWY & QDS boards support
   based on this SoC.
 - Add device tree for LX2160A SoC and NXP QDS & RDB boards support
   based on this SoC.
 - Add qdma devices for LS1043A and LS1046A SoC.
 - Disable PCIe device by default in SoC device tree and let board level
   device tree to enable as needed.
 - Drop compatible string "snps,dw-pcie" from LayerScape PCIe devices to
   avoid incorrect matching.
 - Move fsl-mc device as a child node of soc node, and add missing
   dma-ranges property for LS1088A SoC.
 - Update LayerScape SoCs' cooling maps to include all devices affected
   by individual trip points.

* tag 'imx-dt64-4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux

:
  arm64: dts: ls1046a: add qdma device tree nodes
  arm64: dts: ls1043a: add qdma device tree nodes
  arm64: dts: ls1088a: Add missing dma-ranges property
  arm64: dts: ls1088a: Move fsl-mc node
  arm64: dts: fsl: Add all CPUs in cooling maps
  arm64: dts: Add support for NXP LS1028A SoC
  arm64: dts: layerscape: removed compatible string "snps,dw-pcie"
  arm64: dts: fsl: Add the status property disable PCIe
  arm64: dts: ls1012a: Add FRWY-LS1012A board support
  arm64: dts: add LX2160AQDS board support
  arm64: dts: add LX2160ARDB board support
  arm64: dts: add QorIQ LX2160A SoC support

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents fafda335 58f5fa68

arch/arm64/boot/dts/freescale/Makefile

+5 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: GPL-2.0

dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-frdm.dtb

dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-frwy.dtb

dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-qds.dtb

dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-rdb.dtb

dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds.dtb

dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-rdb.dtb

dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-qds.dtb

dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb.dtb

dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-qds.dtb
@@ -13,3 +16,5 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-rdb.dtb 
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-simu.dtb

dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-qds.dtb

dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-rdb.dtb

dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-qds.dtb

dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-rdb.dtb

arch/arm64/boot/dts/freescale/fsl-ls1012a-frwy.dts

0 → 100644
+25 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)

/*

 * Device Tree file for Freescale LS1012A FRWY Board.

 *

 * Copyright 2018 NXP

 *

 * Pramod Kumar <pramod.kumar_1@nxp.com>

 *

 */

/dts-v1/;



#include "fsl-ls1012a.dtsi"



/ {

	model = "LS1012A FRWY Board";

	compatible = "fsl,ls1012a-frwy", "fsl,ls1012a";

};



&duart0 {

	status = "okay";

};



&i2c0 {

	status = "okay";

};

arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi

+2 −1
Original line number Diff line number Diff line
@@ -475,7 +475,7 @@ 
		};



		pcie@3400000 {

			compatible = "fsl,ls1012a-pcie", "snps,dw-pcie";

			compatible = "fsl,ls1012a-pcie";

			reg = <0x00 0x03400000 0x0 0x00100000   /* controller registers */

			       0x40 0x00000000 0x0 0x00002000>; /* configuration space */

			reg-names = "regs", "config";
@@ -496,6 +496,7 @@ 
					<0000 0 0 2 &gic 0 111 IRQ_TYPE_LEVEL_HIGH>,

					<0000 0 0 3 &gic 0 112 IRQ_TYPE_LEVEL_HIGH>,

					<0000 0 0 4 &gic 0 113 IRQ_TYPE_LEVEL_HIGH>;

			status = "disabled";

		};

	};

arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts

0 → 100644
+93 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)

/*

 * Device Tree file for NXP LS1028A QDS Board.

 *

 * Copyright 2018 NXP

 *

 * Harninder Rai <harninder.rai@nxp.com>

 *

 */



/dts-v1/;



#include "fsl-ls1028a.dtsi"



/ {

	model = "LS1028A QDS Board";

	compatible = "fsl,ls1028a-qds", "fsl,ls1028a";



	aliases {

		gpio0 = &gpio1;

		gpio1 = &gpio2;

		gpio2 = &gpio3;

		serial0 = &duart0;

		serial1 = &duart1;

	};



	chosen {

		stdout-path = "serial0:115200n8";

	};



	memory@80000000 {

		device_type = "memory";

		reg = <0x0 0x80000000 0x1 0x00000000>;

	};

};



&duart0 {

	status = "okay";

};



&duart1 {

	status = "okay";

};



&i2c0 {

	status = "okay";



	i2c-mux@77 {

		compatible = "nxp,pca9847";

		reg = <0x77>;

		#address-cells = <1>;

		#size-cells = <0>;



		i2c@2 {

			#address-cells = <1>;

			#size-cells = <0>;

			reg = <0x2>;



			current-monitor@40 {

				compatible = "ti,ina220";

				reg = <0x40>;

				shunt-resistor = <1000>;

			};



			current-monitor@41 {

				compatible = "ti,ina220";

				reg = <0x41>;

				shunt-resistor = <1000>;

			};

		};



		i2c@3 {

			#address-cells = <1>;

			#size-cells = <0>;

			reg = <0x3>;



			rtc@51 {

				compatible = "nxp,pcf2129";

				reg = <0x51>;

			};



			eeprom@56 {

				compatible = "atmel,24c512";

				reg = <0x56>;

			};



			eeprom@57 {

				compatible = "atmel,24c512";

				reg = <0x57>;

			};

		};

	};

};

arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts

0 → 100644
+73 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)

/*

 * Device Tree file for NXP LS1028A RDB Board.

 *

 * Copyright 2018 NXP

 *

 * Harninder Rai <harninder.rai@nxp.com>

 *

 */



/dts-v1/;

#include "fsl-ls1028a.dtsi"



/ {

	model = "LS1028A RDB Board";

	compatible = "fsl,ls1028a-rdb", "fsl,ls1028a";



	aliases {

		serial0 = &duart0;

		serial1 = &duart1;

	};



	chosen {

		stdout-path = "serial0:115200n8";

	};



	memory@80000000 {

		device_type = "memory";

		reg = <0x0 0x80000000 0x1 0x0000000>;

	};

};



&i2c0 {

	status = "okay";



	i2c-mux@77 {

		compatible = "nxp,pca9847";

		reg = <0x77>;

		#address-cells = <1>;

		#size-cells = <0>;



		i2c@2 {

			#address-cells = <1>;

			#size-cells = <0>;

			reg = <0x02>;



			current-monitor@40 {

				compatible = "ti,ina220";

				reg = <0x40>;

				shunt-resistor = <500>;

			};

		};



		i2c@3 {

			#address-cells = <1>;

			#size-cells = <0>;

			reg = <0x3>;



			rtc@51 {

				compatible = "nxp,pcf2129";

				reg = <0x51>;

			};

		};

	};

};



&duart0 {

	status = "okay";

};



&duart1 {

	status = "okay";

};

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