phy: ti: gmii-sel: add support for am654x/j721e soc (d9aa91df) · Commits · 戴 / test

TI AM654x/J721E SoCs have the same PHY interface selection mechanism for CPSWx subsystem as TI SoCs (AM3/4/5/DRA7), but registers and bit-fields placement is different. This patch adds corresponding support for TI AM654x/J721E SoCs PHY interface selection. Signed-off-by:

Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by:

Kishon Vijay Abraham I <kishon@ti.com>

drivers/phy/ti/phy-gmii-sel.c

+19 −0

Original line number	Diff line number	Diff line
		@@ -170,6 +170,21 @@ struct phy_gmii_sel_soc_data phy_gmii_sel_soc_dm814 = {
		.regfields = phy_gmii_sel_fields_am33xx,
		};

		static const
		struct reg_field phy_gmii_sel_fields_am654[][PHY_GMII_SEL_LAST] = {
		{
		[PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x4040, 0, 1),
		[PHY_GMII_SEL_RGMII_ID_MODE] = REG_FIELD((~0), 0, 0),
		[PHY_GMII_SEL_RMII_IO_CLK_EN] = REG_FIELD((~0), 0, 0),
		},
		};

		static const
		struct phy_gmii_sel_soc_data phy_gmii_sel_soc_am654 = {
		.num_ports = 1,
		.regfields = phy_gmii_sel_fields_am654,
		};

		static const struct of_device_id phy_gmii_sel_id_table[] = {
		{
		.compatible = "ti,am3352-phy-gmii-sel",
		@@ -187,6 +202,10 @@ static const struct of_device_id phy_gmii_sel_id_table[] = {
		.compatible = "ti,dm814-phy-gmii-sel",
		.data = &phy_gmii_sel_soc_dm814,
		},
		{
		.compatible = "ti,am654-phy-gmii-sel",
		.data = &phy_gmii_sel_soc_am654,
		},
		{}
		};
		MODULE_DEVICE_TABLE(of, phy_gmii_sel_id_table);

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