Commit d708da24 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'berlin-dt-for-3.20-1' of... 

Merge tag 'berlin-dt-for-3.20-1' of git://git.infradead.org/users/hesselba/linux-berlin into next/dt

Merge "ARM: berlin: DT changes for v3.20 (round 1)" from Sebastian Hesselbarth:

Berlin DT changes for v3.20 (round 1)
- add PMU nodes for BG2Q and BG2CD
- add PPI CPU masks for TWD timer interrupts

* tag 'berlin-dt-for-3.20-1' of git://git.infradead.org/users/hesselba/linux-berlin

:
  ARM: dts: berlin: add PPI cpu mask to twd timer interrupts
  ARM: dts: berlin: add pmu node for BG2Q and BG2CD

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents cb612390 2356d2f3

arch/arm/boot/dts/berlin2.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -104,7 +104,7 @@ 
		local-timer@ad0600 {

			compatible = "arm,cortex-a9-twd-timer";

			reg = <0xad0600 0x20>;

			interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;

			interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;

			clocks = <&chip CLKID_TWD>;

		};

arch/arm/boot/dts/berlin2cd.dtsi

+6 −1
Original line number Diff line number Diff line
@@ -45,6 +45,11 @@ 


		ranges = <0 0xf7000000 0x1000000>;



		pmu {

			compatible = "arm,cortex-a9-pmu";

			interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;

		};



		sdhci0: sdhci@ab0000 {

			compatible = "mrvl,pxav3-mmc";

			reg = <0xab0000 0x200>;
@@ -71,7 +76,7 @@ 
		local-timer@ad0600 {

			compatible = "arm,cortex-a9-twd-timer";

			reg = <0xad0600 0x20>;

			interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;

			interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;

			clocks = <&chip CLKID_TWD>;

		};

arch/arm/boot/dts/berlin2q.dtsi

+9 −1
Original line number Diff line number Diff line
@@ -63,6 +63,14 @@ 
		ranges = <0 0xf7000000 0x1000000>;

		interrupt-parent = <&gic>;



		pmu {

			compatible = "arm,cortex-a9-pmu";

			interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;

		};



		sdhci0: sdhci@ab0000 {

			compatible = "mrvl,pxav3-mmc";

			reg = <0xab0000 0x200>;
@@ -104,7 +112,7 @@ 
			compatible = "arm,cortex-a9-twd-timer";

			reg = <0xad0600 0x20>;

			clocks = <&chip CLKID_TWD>;

			interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;

			interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;

		};



		gic: interrupt-controller@ad1000 {

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