Commit 2356d2f3 authored by Jisheng Zhang's avatar Jisheng Zhang Committed by Sebastian Hesselbarth
Browse files

ARM: dts: berlin: add PPI cpu mask to twd timer interrupts 



According to the gic binding document, "bits[15:8] PPI interrupt cpu
mask.  Each bit corresponds to each of the 8 possible cpus attached to
the GIC.  A bit set to '1' indicated the interrupt is wired to that
CPU." This patch wants to add the PPI cpu mask for completeness.

Signed-off-by: default avatarJisheng Zhang <jszhang@marvell.com>
Signed-off-by: default avatarSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
parent d4ce8042

arch/arm/boot/dts/berlin2.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -104,7 +104,7 @@ 
		local-timer@ad0600 {

			compatible = "arm,cortex-a9-twd-timer";

			reg = <0xad0600 0x20>;

			interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;

			interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;

			clocks = <&chip CLKID_TWD>;

		};

arch/arm/boot/dts/berlin2cd.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -76,7 +76,7 @@ 
		local-timer@ad0600 {

			compatible = "arm,cortex-a9-twd-timer";

			reg = <0xad0600 0x20>;

			interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;

			interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;

			clocks = <&chip CLKID_TWD>;

		};

arch/arm/boot/dts/berlin2q.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -112,7 +112,7 @@ 
			compatible = "arm,cortex-a9-twd-timer";

			reg = <0xad0600 0x20>;

			clocks = <&chip CLKID_TWD>;

			interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;

			interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;

		};



		gic: interrupt-controller@ad1000 {

CRA Git | Maintained and supported by SUSTech CRA and CCSE