Commit d5fe60d3 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'tegra-for-3.8-cpuidle' of... 

Merge tag 'tegra-for-3.8-cpuidle' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/soc

From Stephen Warren:
ARM: tegra: cpuidle enhancements

A cpuidle state "LP2" is added, which power-gates the CPUs. Support for
CPUs 1..n is essentially complete, although support for CPU0 could
benefit from future use of coupled-cpuidle or similar techniques.

A couple of very minor cleanups to cpuidle were included too.

This pull request is based on tegra-for-3.8-soc.

* tag 'tegra-for-3.8-cpuidle' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
  ARM: tegra: retain L2 content over CPU suspend/resume
  ARM: tegra30: cpuidle: add powered-down state for CPU0
  ARM: tegra30: flowctrl: add cpu_suspend_exter/exit function
  ARM: tegra30: clocks: add CPU low-power function into tegra_cpu_car_ops
  ARM: tegra30: common: enable csite clock
  ARM: tegra30: cpuidle: add powered-down state for secondary CPUs
  ARM: tegra: cpuidle: add CPU resume function
  ARM: tegra: cpuidle: separate cpuidle driver for different chips
  ARM: tegra: rename the file of "sleep-tXX" to "sleep-tegraXX"
  ARM: tegra: cpuidle: replace LP3 with ARM_CPUIDLE_WFI_STATE
parents 5e505bb9 29a0e7be

arch/arm/mach-tegra/Makefile

+9 −2
Original line number Diff line number Diff line
@@ -8,17 +8,24 @@ obj-y += pmc.o 
obj-y					+= flowctrl.o

obj-y					+= powergate.o

obj-y					+= apbio.o

obj-y					+= pm.o

obj-$(CONFIG_CPU_IDLE)			+= cpuidle.o

obj-$(CONFIG_CPU_IDLE)			+= sleep.o

obj-$(CONFIG_ARCH_TEGRA_2x_SOC)         += tegra20_clocks.o

obj-$(CONFIG_ARCH_TEGRA_2x_SOC)         += tegra20_clocks_data.o

obj-$(CONFIG_ARCH_TEGRA_2x_SOC)		+= tegra20_speedo.o

obj-$(CONFIG_ARCH_TEGRA_2x_SOC)		+= tegra2_emc.o

obj-$(CONFIG_ARCH_TEGRA_2x_SOC)		+= sleep-t20.o

obj-$(CONFIG_ARCH_TEGRA_2x_SOC)		+= sleep-tegra20.o

ifeq ($(CONFIG_CPU_IDLE),y)

obj-$(CONFIG_ARCH_TEGRA_2x_SOC)		+= cpuidle-tegra20.o

endif

obj-$(CONFIG_ARCH_TEGRA_3x_SOC)		+= tegra30_clocks.o

obj-$(CONFIG_ARCH_TEGRA_3x_SOC)		+= tegra30_clocks_data.o

obj-$(CONFIG_ARCH_TEGRA_3x_SOC)		+= tegra30_speedo.o

obj-$(CONFIG_ARCH_TEGRA_3x_SOC)		+= sleep-t30.o

obj-$(CONFIG_ARCH_TEGRA_3x_SOC)		+= sleep-tegra30.o

ifeq ($(CONFIG_CPU_IDLE),y)

obj-$(CONFIG_ARCH_TEGRA_3x_SOC)		+= cpuidle-tegra30.o

endif

obj-$(CONFIG_SMP)			+= platsmp.o headsmp.o

obj-$(CONFIG_SMP)                       += reset.o

obj-$(CONFIG_HOTPLUG_CPU)               += hotplug.o

arch/arm/mach-tegra/common.c

+6 −1
Original line number Diff line number Diff line
@@ -36,6 +36,7 @@ 
#include "pmc.h"

#include "apbio.h"

#include "sleep.h"

#include "pm.h"



/*

 * Storage for debug-macro.S's state.
@@ -108,6 +109,7 @@ static __initdata struct tegra_clk_init_table tegra30_clk_init_table[] = { 
	{ "sclk",	"pll_p_out4",	102000000,	true },

	{ "hclk",	"sclk",		102000000,	true },

	{ "pclk",	"hclk",		51000000,	true },

	{ "csite",	NULL,		0,		true },

	{ NULL,		NULL,		0,		0},

};

#endif
@@ -116,6 +118,7 @@ static __initdata struct tegra_clk_init_table tegra30_clk_init_table[] = { 
static void __init tegra_init_cache(void)

{

#ifdef CONFIG_CACHE_L2X0

	int ret;

	void __iomem *p = IO_ADDRESS(TEGRA_ARM_PERIF_BASE) + 0x3000;

	u32 aux_ctrl, cache_type;
@@ -123,7 +126,9 @@ static void __init tegra_init_cache(void) 
	aux_ctrl = (cache_type & 0x700) << (17-8);

	aux_ctrl |= 0x7C400001;



	l2x0_of_init(aux_ctrl, 0x8200c3fe);

	ret = l2x0_of_init(aux_ctrl, 0x8200c3fe);

	if (!ret)

		l2x0_saved_regs_addr = virt_to_phys(&l2x0_saved_regs);

#endif



}

arch/arm/mach-tegra/cpuidle-tegra20.c

0 → 100644
+66 −0
Original line number Diff line number Diff line 
/*

 * CPU idle driver for Tegra CPUs

 *

 * Copyright (c) 2010-2012, NVIDIA Corporation.

 * Copyright (c) 2011 Google, Inc.

 * Author: Colin Cross <ccross@android.com>

 *         Gary King <gking@nvidia.com>

 *

 * Rework for 3.3 by Peter De Schrijver <pdeschrijver@nvidia.com>

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License as published by

 * the Free Software Foundation; either version 2 of the License, or

 * (at your option) any later version.

 *

 * This program is distributed in the hope that it will be useful, but WITHOUT

 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for

 * more details.

 */



#include <linux/kernel.h>

#include <linux/module.h>

#include <linux/cpuidle.h>



#include <asm/cpuidle.h>



static struct cpuidle_driver tegra_idle_driver = {

	.name = "tegra_idle",

	.owner = THIS_MODULE,

	.en_core_tk_irqen = 1,

	.state_count = 1,

	.states = {

		[0] = ARM_CPUIDLE_WFI_STATE_PWR(600),

	},

};



static DEFINE_PER_CPU(struct cpuidle_device, tegra_idle_device);



int __init tegra20_cpuidle_init(void)

{

	int ret;

	unsigned int cpu;

	struct cpuidle_device *dev;

	struct cpuidle_driver *drv = &tegra_idle_driver;



	ret = cpuidle_register_driver(&tegra_idle_driver);

	if (ret) {

		pr_err("CPUidle driver registration failed\n");

		return ret;

	}



	for_each_possible_cpu(cpu) {

		dev = &per_cpu(tegra_idle_device, cpu);

		dev->cpu = cpu;



		dev->state_count = drv->state_count;

		ret = cpuidle_register_device(dev);

		if (ret) {

			pr_err("CPU%u: CPUidle device registration failed\n",

				cpu);

			return ret;

		}

	}

	return 0;

}

arch/arm/mach-tegra/cpuidle-tegra30.c

0 → 100644
+188 −0
Original line number Diff line number Diff line 
/*

 * CPU idle driver for Tegra CPUs

 *

 * Copyright (c) 2010-2012, NVIDIA Corporation.

 * Copyright (c) 2011 Google, Inc.

 * Author: Colin Cross <ccross@android.com>

 *         Gary King <gking@nvidia.com>

 *

 * Rework for 3.3 by Peter De Schrijver <pdeschrijver@nvidia.com>

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License as published by

 * the Free Software Foundation; either version 2 of the License, or

 * (at your option) any later version.

 *

 * This program is distributed in the hope that it will be useful, but WITHOUT

 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for

 * more details.

 */



#include <linux/kernel.h>

#include <linux/module.h>

#include <linux/cpuidle.h>

#include <linux/cpu_pm.h>

#include <linux/clockchips.h>



#include <asm/cpuidle.h>

#include <asm/proc-fns.h>

#include <asm/suspend.h>

#include <asm/smp_plat.h>



#include "pm.h"

#include "sleep.h"

#include "tegra_cpu_car.h"



#ifdef CONFIG_PM_SLEEP

static int tegra30_idle_lp2(struct cpuidle_device *dev,

			    struct cpuidle_driver *drv,

			    int index);

#endif



static struct cpuidle_driver tegra_idle_driver = {

	.name = "tegra_idle",

	.owner = THIS_MODULE,

	.en_core_tk_irqen = 1,

#ifdef CONFIG_PM_SLEEP

	.state_count = 2,

#else

	.state_count = 1,

#endif

	.states = {

		[0] = ARM_CPUIDLE_WFI_STATE_PWR(600),

#ifdef CONFIG_PM_SLEEP

		[1] = {

			.enter			= tegra30_idle_lp2,

			.exit_latency		= 2000,

			.target_residency	= 2200,

			.power_usage		= 0,

			.flags			= CPUIDLE_FLAG_TIME_VALID,

			.name			= "powered-down",

			.desc			= "CPU power gated",

		},

#endif

	},

};



static DEFINE_PER_CPU(struct cpuidle_device, tegra_idle_device);



#ifdef CONFIG_PM_SLEEP

static bool tegra30_cpu_cluster_power_down(struct cpuidle_device *dev,

					   struct cpuidle_driver *drv,

					   int index)

{

	struct cpuidle_state *state = &drv->states[index];

	u32 cpu_on_time = state->exit_latency;

	u32 cpu_off_time = state->target_residency - state->exit_latency;



	/* All CPUs entering LP2 is not working.

	 * Don't let CPU0 enter LP2 when any secondary CPU is online.

	 */

	if (num_online_cpus() > 1 || !tegra_cpu_rail_off_ready()) {

		cpu_do_idle();

		return false;

	}



	clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &dev->cpu);



	tegra_idle_lp2_last(cpu_on_time, cpu_off_time);



	clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &dev->cpu);



	return true;

}



#ifdef CONFIG_SMP

static bool tegra30_cpu_core_power_down(struct cpuidle_device *dev,

					struct cpuidle_driver *drv,

					int index)

{

	clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &dev->cpu);



	smp_wmb();



	save_cpu_arch_register();



	cpu_suspend(0, tegra30_sleep_cpu_secondary_finish);



	restore_cpu_arch_register();



	clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &dev->cpu);



	return true;

}

#else

static inline bool tegra30_cpu_core_power_down(struct cpuidle_device *dev,

					       struct cpuidle_driver *drv,

					       int index)

{

	return true;

}

#endif



static int __cpuinit tegra30_idle_lp2(struct cpuidle_device *dev,

				      struct cpuidle_driver *drv,

				      int index)

{

	u32 cpu = is_smp() ? cpu_logical_map(dev->cpu) : dev->cpu;

	bool entered_lp2 = false;

	bool last_cpu;



	local_fiq_disable();



	last_cpu = tegra_set_cpu_in_lp2(cpu);

	cpu_pm_enter();



	if (cpu == 0) {

		if (last_cpu)

			entered_lp2 = tegra30_cpu_cluster_power_down(dev, drv,

								     index);

		else

			cpu_do_idle();

	} else {

		entered_lp2 = tegra30_cpu_core_power_down(dev, drv, index);

	}



	cpu_pm_exit();

	tegra_clear_cpu_in_lp2(cpu);



	local_fiq_enable();



	smp_rmb();



	return (entered_lp2) ? index : 0;

}

#endif



int __init tegra30_cpuidle_init(void)

{

	int ret;

	unsigned int cpu;

	struct cpuidle_device *dev;

	struct cpuidle_driver *drv = &tegra_idle_driver;



#ifdef CONFIG_PM_SLEEP

	tegra_tear_down_cpu = tegra30_tear_down_cpu;

#endif



	ret = cpuidle_register_driver(&tegra_idle_driver);

	if (ret) {

		pr_err("CPUidle driver registration failed\n");

		return ret;

	}



	for_each_possible_cpu(cpu) {

		dev = &per_cpu(tegra_idle_device, cpu);

		dev->cpu = cpu;



		dev->state_count = drv->state_count;

		ret = cpuidle_register_device(dev);

		if (ret) {

			pr_err("CPU%u: CPUidle device registration failed\n",

				cpu);

			return ret;

		}

	}

	return 0;

}

arch/arm/mach-tegra/cpuidle.c

+13 −70
Original line number Diff line number Diff line
@@ -23,83 +23,26 @@ 


#include <linux/kernel.h>

#include <linux/module.h>

#include <linux/cpu.h>

#include <linux/cpuidle.h>

#include <linux/hrtimer.h>



#include <asm/proc-fns.h>



static int tegra_idle_enter_lp3(struct cpuidle_device *dev,

				struct cpuidle_driver *drv, int index);



struct cpuidle_driver tegra_idle_driver = {

	.name = "tegra_idle",

	.owner = THIS_MODULE,

	.state_count = 1,

	.states = {

		[0] = {

			.enter			= tegra_idle_enter_lp3,

			.exit_latency		= 10,

			.target_residency	= 10,

			.power_usage		= 600,

			.flags			= CPUIDLE_FLAG_TIME_VALID,

			.name			= "LP3",

			.desc			= "CPU flow-controlled",

		},

	},

};



static DEFINE_PER_CPU(struct cpuidle_device, tegra_idle_device);



static int tegra_idle_enter_lp3(struct cpuidle_device *dev,

	struct cpuidle_driver *drv, int index)

{

	ktime_t enter, exit;

	s64 us;



	local_irq_disable();

	local_fiq_disable();



	enter = ktime_get();



	cpu_do_idle();



	exit = ktime_sub(ktime_get(), enter);

	us = ktime_to_us(exit);



	local_fiq_enable();

	local_irq_enable();



	dev->last_residency = us;



	return index;

}

#include "fuse.h"

#include "cpuidle.h"



static int __init tegra_cpuidle_init(void)

{

	int ret;

	unsigned int cpu;

	struct cpuidle_device *dev;

	struct cpuidle_driver *drv = &tegra_idle_driver;



	ret = cpuidle_register_driver(&tegra_idle_driver);

	if (ret) {

		pr_err("CPUidle driver registration failed\n");

		return ret;

	switch (tegra_chip_id) {

	case TEGRA20:

		ret = tegra20_cpuidle_init();

		break;

	case TEGRA30:

		ret = tegra30_cpuidle_init();

		break;

	default:

		ret = -ENODEV;

		break;

	}



	for_each_possible_cpu(cpu) {

		dev = &per_cpu(tegra_idle_device, cpu);

		dev->cpu = cpu;



		dev->state_count = drv->state_count;

		ret = cpuidle_register_device(dev);

		if (ret) {

			pr_err("CPU%u: CPUidle device registration failed\n",

				cpu);

	return ret;

}

	}

	return 0;

}

device_initcall(tegra_cpuidle_init);

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