Commit ce45327c authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'csky-for-linus-5.2-rc1' of git://github.com/c-sky/csky-linux

Pull arch/csky updates from Guo Ren:

 - Fixup vdsp&fpu issues in kernel

 - Add dynamic function tracer

 - Use in_syscall & forget_syscall instead of r11_sig

 - Reconstruct signal processing

 - Support dynamic start physical address

 - Fixup wrong update_mmu_cache implementation

 - Support vmlinux bootup with MMU off

 - Use va_pa_offset instead of phys_offset

 - Fixup syscall_trace return processing flow

 - Add perf callchain support

 - Add perf_arch_fetch_caller_regs support

 - Add page fault perf event support

 - Add support for perf registers sampling

* tag 'csky-for-linus-5.2-rc1' of git://github.com/c-sky/csky-linux:
  csky/syscall_trace: Fixup return processing flow
  csky: Fixup compile warning
  csky: Add support for perf registers sampling
  csky: add page fault perf event support
  csky: Use va_pa_offset instead of phys_offset
  csky: Support vmlinux bootup with MMU off
  csky: Add perf_arch_fetch_caller_regs support
  csky: Fixup wrong update_mmu_cache implementation
  csky: Support dynamic start physical address
  csky: Reconstruct signal processing
  csky: Use in_syscall & forget_syscall instead of r11_sig
  csky: Add non-uapi asm/ptrace.h namespace
  csky: mm/fault.c: Remove duplicate header
  csky: remove redundant generic-y
  csky: Update syscall_trace_enter/exit implementation
  csky: Add perf callchain support
  csky/ftrace: Add dynamic function tracer (include graph tracer)
  csky: Fixup vdsp&fpu issues in kernel
parents e7a1414f a691f333
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+6 −1
Original line number Diff line number Diff line
@@ -29,15 +29,20 @@ config CSKY
	select GENERIC_SCHED_CLOCK
	select GENERIC_SMP_IDLE_THREAD
	select HAVE_ARCH_TRACEHOOK
	select HAVE_ARCH_AUDITSYSCALL
	select HAVE_DYNAMIC_FTRACE
	select HAVE_FUNCTION_TRACER
	select HAVE_FUNCTION_GRAPH_TRACER
	select HAVE_FTRACE_MCOUNT_RECORD
	select HAVE_KERNEL_GZIP
	select HAVE_KERNEL_LZO
	select HAVE_KERNEL_LZMA
	select HAVE_PERF_EVENTS
	select HAVE_C_RECORDMCOUNT
	select HAVE_PERF_REGS
	select HAVE_PERF_USER_STACK_DUMP
	select HAVE_DMA_API_DEBUG
	select HAVE_DMA_CONTIGUOUS
	select HAVE_SYSCALL_TRACEPOINTS
	select MAY_HAVE_SPARSE_IRQ
	select MODULES_USE_ELF_RELA if MODULES
	select OF
+1 −1
Original line number Diff line number Diff line
@@ -36,7 +36,7 @@ endif

ifneq ($(CSKYABI),)
MCPU_STR = $(CPUTYPE)$(FPUEXT)$(VDSPEXT)$(TEEEXT)
KBUILD_CFLAGS += -mcpu=$(MCPU_STR)
KBUILD_CFLAGS += -mcpu=$(CPUTYPE) -Wa,-mcpu=$(MCPU_STR)
KBUILD_CFLAGS += -DCSKYCPU_DEF_NAME=\"$(MCPU_STR)\"
KBUILD_CFLAGS += -msoft-float -mdiv
KBUILD_CFLAGS += -fno-tree-vectorize
+22 −2
Original line number Diff line number Diff line
@@ -40,6 +40,26 @@ static inline void write_mmu_entryhi(int value)
	cpwcr("cpcr4", value);
}

static inline unsigned long read_mmu_msa0(void)
{
	return cprcr("cpcr30");
}

static inline void write_mmu_msa0(unsigned long value)
{
	cpwcr("cpcr30", value);
}

static inline unsigned long read_mmu_msa1(void)
{
	return cprcr("cpcr31");
}

static inline void write_mmu_msa1(unsigned long value)
{
	cpwcr("cpcr31", value);
}

/*
 * TLB operations.
 */
@@ -65,11 +85,11 @@ static inline void tlb_invalid_indexed(void)

static inline void setup_pgd(unsigned long pgd, bool kernel)
{
	cpwcr("cpcr29", pgd);
	cpwcr("cpcr29", pgd | BIT(0));
}

static inline unsigned long get_pgd(void)
{
	return cprcr("cpcr29");
	return cprcr("cpcr29") & ~BIT(0);
}
#endif /* __ASM_CSKY_CKMMUV1_H */
+29 −12
Original line number Diff line number Diff line
@@ -16,9 +16,6 @@
#define LSAVE_A4	40
#define LSAVE_A5	44

#define EPC_INCREASE	2
#define EPC_KEEP	0

.macro USPTOKSP
	mtcr	sp, ss1
	mfcr	sp, ss0
@@ -29,10 +26,6 @@
	mfcr	sp, ss1
.endm

.macro INCTRAP	rx
	addi	\rx, EPC_INCREASE
.endm

.macro	SAVE_ALL epc_inc
	mtcr    r13, ss2
	mfcr    r13, epsr
@@ -150,11 +143,35 @@
	cpwcr   \rx, cpcr8
.endm

.macro SETUP_MMU rx
	lrw	\rx, PHYS_OFFSET | 0xe
	cpwcr	\rx, cpcr30
	lrw	\rx, (PHYS_OFFSET + 0x20000000) | 0xe
	cpwcr	\rx, cpcr31
.macro SETUP_MMU
	/* Init psr and enable ee */
	lrw	r6, DEFAULT_PSR_VALUE
	mtcr    r6, psr
	psrset  ee

	/* Select MMU as co-processor */
	cpseti	cp15

	/*
	 * cpcr30 format:
	 * 31 - 29 | 28 - 4 | 3 | 2 | 1 | 0
	 *   BA     Reserved  C   D   V
	 */
	cprcr	r6, cpcr30
	lsri	r6, 28
	lsli	r6, 28
	addi	r6, 0xe
	cpwcr	r6, cpcr30

	lsri	r6, 28
	addi	r6, 2
	lsli	r6, 28
	addi	r6, 0xe
	cpwcr	r6, cpcr31
.endm

.macro ANDI_R3 rx, imm
	lsri	\rx, 3
	andi	\rx, (\imm >> 3)
.endm
#endif /* __ASM_CSKY_ENTRY_H */
+3 −2
Original line number Diff line number Diff line
@@ -5,9 +5,8 @@
#define __ASM_CSKY_REGDEF_H

#define syscallid	r1
#define r11_sig		r11

#define regs_syscallid(regs) regs->regs[9]
#define regs_fp(regs) regs->regs[2]

/*
 * PSR format:
@@ -23,4 +22,6 @@

#define SYSTRACE_SAVENUM	2

#define TRAP0_SIZE		2

#endif /* __ASM_CSKY_REGDEF_H */
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