Commit cbe3e1d1 authored by Tvrtko Ursulin's avatar Tvrtko Ursulin
Browse files

drm/i915/icl: Add WaDisableBankHangMode 



Disable GPU hang by default on unrecoverable ECC cache errors.

v2:
 * Rebase.

v3:
 * Use intel_uncore_read. (Chris)

Fixes: cc38cae7 ("drm/i915/icl: Introduce initial Icelake Workarounds")
Signed-off-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
Acked-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190520110442.403-2-tvrtko.ursulin@linux.intel.com
parent fde93886

drivers/gpu/drm/i915/gt/intel_workarounds.c

+6 −0
Original line number Diff line number Diff line
@@ -529,6 +529,12 @@ static void icl_ctx_workarounds_init(struct intel_engine_cs *engine, 
{

	struct drm_i915_private *i915 = engine->i915;



	/* WaDisableBankHangMode:icl */

	wa_write(wal,

		 GEN8_L3CNTLREG,

		 intel_uncore_read(engine->uncore, GEN8_L3CNTLREG) |

		 GEN8_ERRDETBCTRL);



	/* Wa_1604370585:icl (pre-prod)

	 * Formerly known as WaPushConstantDereferenceHoldDisable

	 */

drivers/gpu/drm/i915/i915_reg.h

+3 −0
Original line number Diff line number Diff line
@@ -7621,6 +7621,9 @@ enum { 
  #define GEN8_SBE_DISABLE_REPLAY_BUF_OPTIMIZATION		(1 << 8)

  #define GEN8_CSC2_SBE_VUE_CACHE_CONSERVATIVE			(1 << 0)



#define GEN8_L3CNTLREG	_MMIO(0x7034)

  #define GEN8_ERRDETBCTRL (1 << 9)



#define GEN11_COMMON_SLICE_CHICKEN3		_MMIO(0x7304)

  #define GEN11_BLEND_EMB_FIX_DISABLE_IN_RCC	(1 << 11)

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