Commit cadd5312 authored by Stephen Boyd's avatar Stephen Boyd
Browse files

Merge tag 'clk-meson-v5.11-1' of https://github.com/BayLibre/clk-meson into clk-amlogic 

Pull Amlogic clk driver updates from Jerome Brunet:

 - Add MIPI DSI clocks for axg and g12
 - Make it possible to build controllers as modules
 - Fix Video PLL clock dependency

* tag 'clk-meson-v5.11-1' of https://github.com/BayLibre/clk-meson:
  clk: meson: g12a: add MIPI DSI Host Pixel Clock
  dt-bindings: clk: g12a-clkc: add DSI Pixel clock bindings
  clk: meson: enable building as modules
  clk: meson: Kconfig: fix dependency for G12A
  clk: meson: axg: add MIPI DSI Host clock
  clk: meson: axg: add Video Clocks
  dt-bindings: clk: axg-clkc: add MIPI DSI Host clock binding
  dt-bindings: clk: axg-clkc: add Video Clocks
  clk: meson: g12: use devm variant to register notifiers
  clk: add devm variant of clk_notifier_register
  clk: meson: g12: drop use of __clk_lookup()
  clk: add api to get clk consumer from clk_hw
  clk: avoid devm_clk_release name clash
parents 3650b228 88b9ae60

drivers/clk/clk.c

+103 −6
Original line number Diff line number Diff line
@@ -3667,6 +3667,24 @@ struct clk *clk_hw_create_clk(struct device *dev, struct clk_hw *hw, 
	return clk;

}



/**

 * clk_hw_get_clk - get clk consumer given an clk_hw

 * @hw: clk_hw associated with the clk being consumed

 * @con_id: connection ID string on device

 *

 * Returns: new clk consumer

 * This is the function to be used by providers which need

 * to get a consumer clk and act on the clock element

 * Calls to this function must be balanced with calls clk_put()

 */

struct clk *clk_hw_get_clk(struct clk_hw *hw, const char *con_id)

{

	struct device *dev = hw->core->dev;



	return clk_hw_create_clk(dev, hw, dev_name(dev), con_id);

}

EXPORT_SYMBOL(clk_hw_get_clk);



static int clk_cpy_name(const char **dst_p, const char *src, bool must_exist)

{

	const char *dst;
@@ -4068,12 +4086,12 @@ void clk_hw_unregister(struct clk_hw *hw) 
}

EXPORT_SYMBOL_GPL(clk_hw_unregister);



static void devm_clk_release(struct device *dev, void *res)

static void devm_clk_unregister_cb(struct device *dev, void *res)

{

	clk_unregister(*(struct clk **)res);

}



static void devm_clk_hw_release(struct device *dev, void *res)

static void devm_clk_hw_unregister_cb(struct device *dev, void *res)

{

	clk_hw_unregister(*(struct clk_hw **)res);

}
@@ -4093,7 +4111,7 @@ struct clk *devm_clk_register(struct device *dev, struct clk_hw *hw) 
	struct clk *clk;

	struct clk **clkp;



	clkp = devres_alloc(devm_clk_release, sizeof(*clkp), GFP_KERNEL);

	clkp = devres_alloc(devm_clk_unregister_cb, sizeof(*clkp), GFP_KERNEL);

	if (!clkp)

		return ERR_PTR(-ENOMEM);
@@ -4123,7 +4141,7 @@ int devm_clk_hw_register(struct device *dev, struct clk_hw *hw) 
	struct clk_hw **hwp;

	int ret;



	hwp = devres_alloc(devm_clk_hw_release, sizeof(*hwp), GFP_KERNEL);

	hwp = devres_alloc(devm_clk_hw_unregister_cb, sizeof(*hwp), GFP_KERNEL);

	if (!hwp)

		return -ENOMEM;
@@ -4167,7 +4185,7 @@ static int devm_clk_hw_match(struct device *dev, void *res, void *data) 
 */

void devm_clk_unregister(struct device *dev, struct clk *clk)

{

	WARN_ON(devres_release(dev, devm_clk_release, devm_clk_match, clk));

	WARN_ON(devres_release(dev, devm_clk_unregister_cb, devm_clk_match, clk));

}

EXPORT_SYMBOL_GPL(devm_clk_unregister);
@@ -4182,11 +4200,54 @@ EXPORT_SYMBOL_GPL(devm_clk_unregister); 
 */

void devm_clk_hw_unregister(struct device *dev, struct clk_hw *hw)

{

	WARN_ON(devres_release(dev, devm_clk_hw_release, devm_clk_hw_match,

	WARN_ON(devres_release(dev, devm_clk_hw_unregister_cb, devm_clk_hw_match,

				hw));

}

EXPORT_SYMBOL_GPL(devm_clk_hw_unregister);



static void devm_clk_release(struct device *dev, void *res)

{

	clk_put(*(struct clk **)res);

}



/**

 * devm_clk_hw_get_clk - resource managed clk_hw_get_clk()

 * @dev: device that is registering this clock

 * @hw: clk_hw associated with the clk being consumed

 * @con_id: connection ID string on device

 *

 * Managed clk_hw_get_clk(). Clocks got with this function are

 * automatically clk_put() on driver detach. See clk_put()

 * for more information.

 */

struct clk *devm_clk_hw_get_clk(struct device *dev, struct clk_hw *hw,

				const char *con_id)

{

	struct clk *clk;

	struct clk **clkp;



	/* This should not happen because it would mean we have drivers

	 * passing around clk_hw pointers instead of having the caller use

	 * proper clk_get() style APIs

	 */

	WARN_ON_ONCE(dev != hw->core->dev);



	clkp = devres_alloc(devm_clk_release, sizeof(*clkp), GFP_KERNEL);

	if (!clkp)

		return ERR_PTR(-ENOMEM);



	clk = clk_hw_get_clk(hw, con_id);

	if (!IS_ERR(clk)) {

		*clkp = clk;

		devres_add(dev, clkp);

	} else {

		devres_free(clkp);

	}



	return clk;

}

EXPORT_SYMBOL_GPL(devm_clk_hw_get_clk);



/*

 * clkdev helpers

 */
@@ -4334,6 +4395,42 @@ int clk_notifier_unregister(struct clk *clk, struct notifier_block *nb) 
}

EXPORT_SYMBOL_GPL(clk_notifier_unregister);



struct clk_notifier_devres {

	struct clk *clk;

	struct notifier_block *nb;

};



static void devm_clk_notifier_release(struct device *dev, void *res)

{

	struct clk_notifier_devres *devres = res;



	clk_notifier_unregister(devres->clk, devres->nb);

}



int devm_clk_notifier_register(struct device *dev, struct clk *clk,

			       struct notifier_block *nb)

{

	struct clk_notifier_devres *devres;

	int ret;



	devres = devres_alloc(devm_clk_notifier_release,

			      sizeof(*devres), GFP_KERNEL);



	if (!devres)

		return -ENOMEM;



	ret = clk_notifier_register(clk, nb);

	if (!ret) {

		devres->clk = clk;

		devres->nb = nb;

	} else {

		devres_free(devres);

	}



	return ret;

}

EXPORT_SYMBOL_GPL(devm_clk_notifier_register);



#ifdef CONFIG_OF

static void clk_core_reparent_orphans(void)

{

drivers/clk/meson/Kconfig

+4 −3
Original line number Diff line number Diff line
@@ -58,7 +58,7 @@ config COMMON_CLK_MESON8B 
	  want peripherals and CPU frequency scaling to work.



config COMMON_CLK_GXBB

	bool "GXBB and GXL SoC clock controllers support"

	tristate "GXBB and GXL SoC clock controllers support"

	depends on ARM64

	default y

	select COMMON_CLK_MESON_REGMAP
@@ -74,7 +74,7 @@ config COMMON_CLK_GXBB 
	  Say Y if you want peripherals and CPU frequency scaling to work.



config COMMON_CLK_AXG

	bool "AXG SoC clock controllers support"

	tristate "AXG SoC clock controllers support"

	depends on ARM64

	default y

	select COMMON_CLK_MESON_REGMAP
@@ -100,7 +100,7 @@ config COMMON_CLK_AXG_AUDIO 
	  aka axg, Say Y if you want audio subsystem to work.



config COMMON_CLK_G12A

	bool "G12 and SM1 SoC clock controllers support"

	tristate "G12 and SM1 SoC clock controllers support"

	depends on ARM64

	default y

	select COMMON_CLK_MESON_REGMAP
@@ -110,6 +110,7 @@ config COMMON_CLK_G12A 
	select COMMON_CLK_MESON_AO_CLKC

	select COMMON_CLK_MESON_EE_CLKC

	select COMMON_CLK_MESON_CPU_DYNDIV

	select COMMON_CLK_MESON_VID_PLL_DIV

	select MFD_SYSCON

	help

	  Support for the clock controller on Amlogic S905D2, S905X2 and S905Y2

drivers/clk/meson/axg-aoclk.c

+4 −1
Original line number Diff line number Diff line
@@ -12,6 +12,7 @@ 
#include <linux/platform_device.h>

#include <linux/reset-controller.h>

#include <linux/mfd/syscon.h>

#include <linux/module.h>

#include "meson-aoclk.h"

#include "axg-aoclk.h"
@@ -326,6 +327,7 @@ static const struct of_device_id axg_aoclkc_match_table[] = { 
	},

	{ }

};

MODULE_DEVICE_TABLE(of, axg_aoclkc_match_table);



static struct platform_driver axg_aoclkc_driver = {

	.probe		= meson_aoclkc_probe,
@@ -335,4 +337,5 @@ static struct platform_driver axg_aoclkc_driver = { 
	},

};



builtin_platform_driver(axg_aoclkc_driver);
 
module_platform_driver(axg_aoclkc_driver);

MODULE_LICENSE("GPL v2");

drivers/clk/meson/axg.c

+823 −1

File changed.

Preview size limit exceeded, changes collapsed.

drivers/clk/meson/axg.h

+22 −1
Original line number Diff line number Diff line
@@ -139,8 +139,29 @@ 
#define CLKID_HIFI_PLL_DCO			88

#define CLKID_PCIE_PLL_DCO			89

#define CLKID_PCIE_PLL_OD			90

#define CLKID_VPU_0_DIV				91

#define CLKID_VPU_1_DIV				94

#define CLKID_VAPB_0_DIV			98

#define CLKID_VAPB_1_DIV			101

#define CLKID_VCLK_SEL				108

#define CLKID_VCLK2_SEL				109

#define CLKID_VCLK_INPUT			110

#define CLKID_VCLK2_INPUT			111

#define CLKID_VCLK_DIV				112

#define CLKID_VCLK2_DIV				113

#define CLKID_VCLK_DIV2_EN			114

#define CLKID_VCLK_DIV4_EN			115

#define CLKID_VCLK_DIV6_EN			116

#define CLKID_VCLK_DIV12_EN			117

#define CLKID_VCLK2_DIV2_EN			118

#define CLKID_VCLK2_DIV4_EN			119

#define CLKID_VCLK2_DIV6_EN			120

#define CLKID_VCLK2_DIV12_EN			121

#define CLKID_CTS_ENCL_SEL			132

#define CLKID_VDIN_MEAS_SEL			134

#define CLKID_VDIN_MEAS_DIV			135



#define NR_CLKS					91

#define NR_CLKS					137



/* include the CLKIDs that have been made part of the DT binding */

#include <dt-bindings/clock/axg-clkc.h>

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