Commit cad8e5a7 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven Committed by Simon Horman
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ARM: dts: r7s72100: Correct RTC interrupt types 



According to table 7.3 ("List of Interrupt IDs") in the RZ/A1H Hardware
User's Manual rev. 3.00, the realtime clock interrupts are level not
edge interrupts.

Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent c02cc235

arch/arm/boot/dts/r7s72100.dtsi

+3 −3
Original line number Diff line number Diff line
@@ -682,9 +682,9 @@ 
		rtc: rtc@fcff1000 {

			compatible = "renesas,r7s72100-rtc", "renesas,sh-rtc";

			reg = <0xfcff1000 0x2e>;

			interrupts = <GIC_SPI 276 IRQ_TYPE_EDGE_RISING

				      GIC_SPI 277 IRQ_TYPE_EDGE_RISING

				      GIC_SPI 278 IRQ_TYPE_EDGE_RISING>;

			interrupts = <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "alarm", "period", "carry";

			clocks = <&mstp6_clks R7S72100_CLK_RTC>, <&rtc_x1_clk>,

				 <&rtc_x3_clk>, <&extal_clk>;

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