Commit c835ad64 authored by Gal Pressman's avatar Gal Pressman Committed by Saeed Mahameed
Browse files

net/mlx5: Implement PCAM, MCAM access register commands 



Introduced registers will expose capabilities of new registers and
features related to port/management.
Driver will query MCAM and PCAM in order to avoid failing on old
firmwares with lack of support.

Signed-off-by: default avatarGal Pressman <galp@mellanox.com>
Signed-off-by: default avatarSaeed Mahameed <saeedm@mellanox.com>
parent cfdcbcea

drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h

+5 −0
Original line number Diff line number Diff line
@@ -113,6 +113,11 @@ u32 mlx5_get_msix_vec(struct mlx5_core_dev *dev, int vecidx); 
struct mlx5_eq *mlx5_eqn2eq(struct mlx5_core_dev *dev, int eqn);

void mlx5_cq_tasklet_cb(unsigned long data);



int mlx5_query_pcam_reg(struct mlx5_core_dev *dev, u32 *pcam, u8 feature_group,

			u8 access_reg_group);

int mlx5_query_mcam_reg(struct mlx5_core_dev *dev, u32 *mcap, u8 feature_group,

			u8 access_reg_group);



void mlx5_lag_add(struct mlx5_core_dev *dev, struct net_device *netdev);

void mlx5_lag_remove(struct mlx5_core_dev *dev);

drivers/net/ethernet/mellanox/mlx5/core/port.c

+24 −0
Original line number Diff line number Diff line
@@ -74,6 +74,30 @@ out: 
}

EXPORT_SYMBOL_GPL(mlx5_core_access_reg);



int mlx5_query_pcam_reg(struct mlx5_core_dev *dev, u32 *pcam, u8 feature_group,

			u8 access_reg_group)

{

	u32 in[MLX5_ST_SZ_DW(pcam_reg)] = {0};

	int sz = MLX5_ST_SZ_BYTES(pcam_reg);



	MLX5_SET(pcam_reg, in, feature_group, feature_group);

	MLX5_SET(pcam_reg, in, access_reg_group, access_reg_group);



	return mlx5_core_access_reg(dev, in, sz, pcam, sz, MLX5_REG_PCAM, 0, 0);

}



int mlx5_query_mcam_reg(struct mlx5_core_dev *dev, u32 *mcam, u8 feature_group,

			u8 access_reg_group)

{

	u32 in[MLX5_ST_SZ_DW(mcam_reg)] = {0};

	int sz = MLX5_ST_SZ_BYTES(mcam_reg);



	MLX5_SET(mcam_reg, in, feature_group, feature_group);

	MLX5_SET(mcam_reg, in, access_reg_group, access_reg_group);



	return mlx5_core_access_reg(dev, in, sz, mcam, sz, MLX5_REG_MCAM, 0, 0);

}



struct mlx5_reg_pcap {

	u8			rsvd0;

	u8			port_num;

CRA Git | Maintained and supported by SUSTech CRA and CCSE