Unverified Commit c2aeaaea authored by Paul Burton's avatar Paul Burton
Browse files

MIPS: Remove unused R8000 CPU support



Our R8000 CPU support can only be included if a system selects
CONFIG_SYS_HAS_CPU_R8000. No system does, making all R8000-related CPU
support dead code. Remove it.

Signed-off-by: default avatarPaul Burton <paul.burton@mips.com>
Cc: linux-mips@vger.kernel.org
parent ccd51b9f
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+5 −19
Original line number Diff line number Diff line
@@ -1652,16 +1652,6 @@ config CPU_NEVADA
	help
	  QED / PMC-Sierra RM52xx-series ("Nevada") processors.

config CPU_R8000
	bool "R8000"
	depends on SYS_HAS_CPU_R8000
	select CPU_HAS_PREFETCH
	select CPU_HAS_LOAD_STORE_LR
	select CPU_SUPPORTS_64BIT_KERNEL
	help
	  MIPS Technologies R8000 processors.  Note these processors are
	  uncommon and the support for them is incomplete.

config CPU_R10000
	bool "R10000"
	depends on SYS_HAS_CPU_R10000
@@ -1969,9 +1959,6 @@ config SYS_HAS_CPU_R5500
config SYS_HAS_CPU_NEVADA
	bool

config SYS_HAS_CPU_R8000
	bool

config SYS_HAS_CPU_R10000
	bool
	select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
@@ -2172,13 +2159,13 @@ config PAGE_SIZE_4KB

config PAGE_SIZE_8KB
	bool "8kB"
	depends on CPU_R8000 || CPU_CAVIUM_OCTEON
	depends on CPU_CAVIUM_OCTEON
	depends on !MIPS_VA_BITS_48
	help
	  Using 8kB page size will result in higher performance kernel at
	  the price of higher memory consumption.  This option is available
	  only on R8000 and cnMIPS processors.  Note that you will need a
	  suitable Linux distribution to support this.
	  only on cnMIPS processors.  Note that you will need a suitable Linux
	  distribution to support this.

config PAGE_SIZE_16KB
	bool "16kB"
@@ -2269,7 +2256,7 @@ config CPU_HAS_PREFETCH

config CPU_GENERIC_DUMP_TLB
	bool
	default y if !(CPU_R3000 || CPU_R8000 || CPU_TX39XX)
	default y if !(CPU_R3000 || CPU_TX39XX)

config MIPS_FP_SUPPORT
	bool "Floating Point support" if EXPERT
@@ -2298,7 +2285,7 @@ config CPU_R4K_FPU

config CPU_R4K_CACHE_TLB
	bool
	default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
	default y if !(CPU_R3000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON)

config MIPS_MT_SMP
	bool "MIPS MT SMP support (1 TC on each available VPE)"
@@ -2555,7 +2542,6 @@ config CPU_R4400_WORKAROUNDS
config MIPS_ASID_SHIFT
	int
	default 6 if CPU_R3000 || CPU_TX39XX
	default 4 if CPU_R8000
	default 0

config MIPS_ASID_BITS
+0 −1
Original line number Diff line number Diff line
@@ -183,7 +183,6 @@ cflags-$(CONFIG_CPU_SB1) += $(call cc-option,-march=sb1,-march=r5000) \
			-Wa,--trap
cflags-$(CONFIG_CPU_SB1)	+= $(call cc-option,-mno-mdmx)
cflags-$(CONFIG_CPU_SB1)	+= $(call cc-option,-mno-mips3d)
cflags-$(CONFIG_CPU_R8000)	+= -march=r8000 -Wa,--trap
cflags-$(CONFIG_CPU_R10000)	+= $(call cc-option,-march=r10000,-march=r8000) \
			-Wa,--trap
cflags-$(CONFIG_CPU_CAVIUM_OCTEON) += $(call cc-option,-march=octeon) -Wa,--trap
+0 −9
Original line number Diff line number Diff line
@@ -135,18 +135,9 @@
 */
#define TO_PHYS_MASK	_CONST64_(0x07ffffffffffffff)	/* 2^^59 - 1 */

#ifndef CONFIG_CPU_R8000

/*
 * The R8000 doesn't have the 32-bit compat spaces so we don't define them
 * in order to catch bugs in the source code.
 */

#define COMPAT_K1BASE32		_CONST64_(0xffffffffa0000000)
#define PHYS_TO_COMPATK1(x)	((x) | COMPAT_K1BASE32) /* 32-bit compat k1 */

#endif

#define KDM_TO_PHYS(x)		(_ACAST64_ (x) & TO_PHYS_MASK)
#define PHYS_TO_K0(x)		(_ACAST64_ (x) | CAC_BASE)

+0 −4
Original line number Diff line number Diff line
@@ -146,10 +146,6 @@ static inline int __pure __get_cpu_type(const int cpu_type)
	case CPU_NEVADA:
#endif

#ifdef CONFIG_SYS_HAS_CPU_R8000
	case CPU_R8000:
#endif

#ifdef CONFIG_SYS_HAS_CPU_R10000
	case CPU_R10000:
	case CPU_R12000:
+0 −5
Original line number Diff line number Diff line
@@ -300,11 +300,6 @@ enum cpu_type_enum {
	CPU_VR4122, CPU_VR4131, CPU_VR4133, CPU_VR4181, CPU_VR4181A, CPU_RM7000,
	CPU_SR71000, CPU_TX49XX,

	/*
	 * R8000 class processors
	 */
	CPU_R8000,

	/*
	 * TX3900 class processors
	 */
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