Commit c2a801af authored by Jack Zhang's avatar Jack Zhang Committed by Alex Deucher
Browse files

amd/amdgpu/sriov enable onevf mode for ARCTURUS VF 



Before, initialization of smu ip block would be skipped
for sriov ASICs. But if there's only one VF being used,
guest driver should be able to dump some HW info such as
clks, temperature,etc.

To solve this, now after onevf mode is enabled, host
driver will notify guest. If it's onevf mode, guest will
do smu hw_init and skip some steps in normal smu hw_init
flow because host driver has already done it for smu.

With this fix, guest app can talk with smu and dump hw
information from smu.

v2: refine the logic for pm_enabled.Skip hw_init by not
changing pm_enabled.
v3: refine is_support_sw_smu and fix some indentation
issue.

Signed-off-by: default avatarJack Zhang <Jack.Zhang1@amd.com>
Acked-by: default avatarEvan Quan <evan.quan@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 6a876844

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

+2 −1
Original line number Diff line number Diff line
@@ -1319,7 +1319,8 @@ out: 
                    || ucode->ucode_id == AMDGPU_UCODE_ID_RLC_G

	            || ucode->ucode_id == AMDGPU_UCODE_ID_RLC_RESTORE_LIST_CNTL

	            || ucode->ucode_id == AMDGPU_UCODE_ID_RLC_RESTORE_LIST_GPM_MEM

	            || ucode->ucode_id == AMDGPU_UCODE_ID_RLC_RESTORE_LIST_SRM_MEM))

	            || ucode->ucode_id == AMDGPU_UCODE_ID_RLC_RESTORE_LIST_SRM_MEM

	            || ucode->ucode_id == AMDGPU_UCODE_ID_SMC))

			/*skip ucode loading in SRIOV VF */

			continue;

drivers/gpu/drm/amd/amdgpu/soc15.c

+1 −2
Original line number Diff line number Diff line
@@ -828,7 +828,6 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev) 
			amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);

		amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block);

		amdgpu_device_ip_block_add(adev, &sdma_v4_0_ip_block);

		if (!amdgpu_sriov_vf(adev))

		amdgpu_device_ip_block_add(adev, &smu_v11_0_ip_block);



		if (amdgpu_sriov_vf(adev)) {

drivers/gpu/drm/amd/powerplay/amdgpu_smu.c

+53 −45
Original line number Diff line number Diff line
@@ -560,7 +560,7 @@ bool is_support_sw_smu(struct amdgpu_device *adev) 
	if (adev->asic_type == CHIP_VEGA20)

		return (amdgpu_dpm == 2) ? true : false;

	else if (adev->asic_type >= CHIP_ARCTURUS) {

		if (amdgpu_sriov_vf(adev))

		if (amdgpu_sriov_vf(adev)&& !amdgpu_sriov_is_pp_one_vf(adev))

			return false;

		else

			return true;
@@ -1090,7 +1090,7 @@ static int smu_smc_table_hw_init(struct smu_context *smu, 
	}



	/* smu_dump_pptable(smu); */



	if (!amdgpu_sriov_vf(adev)) {

		/*

		 * Copy pptable bo in the vram to smc with SMU MSGs such as

		 * SetDriverDramAddr and TransferTableDram2Smu.
@@ -1103,7 +1103,6 @@ static int smu_smc_table_hw_init(struct smu_context *smu, 
		ret = smu_run_btc(smu);

		if (ret)

			return ret;



		ret = smu_feature_set_allowed_mask(smu);

		if (ret)

			return ret;
@@ -1111,7 +1110,7 @@ static int smu_smc_table_hw_init(struct smu_context *smu, 
		ret = smu_system_features_control(smu, true);

		if (ret)

			return ret;



	}

	if (adev->asic_type != CHIP_ARCTURUS) {

		ret = smu_notify_display_change(smu);

		if (ret)
@@ -1164,8 +1163,9 @@ static int smu_smc_table_hw_init(struct smu_context *smu, 
	/*

	 * Set PMSTATUSLOG table bo address with SetToolsDramAddr MSG for tools.

	 */

	if (!amdgpu_sriov_vf(adev)) {

		ret = smu_set_tool_table_location(smu);



	}

	if (!smu_is_dpm_running(smu))

		pr_info("dpm has been disabled\n");
@@ -1277,6 +1277,9 @@ static int smu_hw_init(void *handle) 
		smu_set_gfx_cgpg(&adev->smu, true);

	}



	if (amdgpu_sriov_vf(adev) && !amdgpu_sriov_is_pp_one_vf(adev))

		return 0;



	if (!smu->pm_enabled)

		return 0;
@@ -1329,12 +1332,16 @@ static int smu_hw_fini(void *handle) 
	struct smu_table_context *table_context = &smu->smu_table;

	int ret = 0;



	if (amdgpu_sriov_vf(adev)&& !amdgpu_sriov_is_pp_one_vf(adev))

		return 0;



	if (smu->is_apu) {

		smu_powergate_sdma(&adev->smu, true);

		smu_powergate_vcn(&adev->smu, true);

		smu_powergate_jpeg(&adev->smu, true);

	}



	if (!amdgpu_sriov_vf(adev)){

		ret = smu_stop_thermal_control(smu);

		if (ret) {

			pr_warn("Fail to stop thermal control!\n");
@@ -1361,6 +1368,7 @@ static int smu_hw_fini(void *handle) 
				return ret;

			}

		}

	}



	kfree(table_context->driver_pptable);

	table_context->driver_pptable = NULL;

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