drm/amd/powerplay: retrieve the enabled feature mask from cache (6a876844) · Commits · 戴 / test

drivers/gpu/drm/amd/powerplay/amdgpu_smu.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -1319,7 +1319,7 @@ failed:

		static int smu_stop_dpms(struct smu_context *smu)
		{
		return smu_send_smc_msg(smu, SMU_MSG_DisableAllSmuFeatures);
		return smu_system_features_control(smu, false);
		}

		static int smu_hw_fini(void *handle)

+35 −26

Original line number	Diff line number	Diff line
		@@ -835,11 +835,13 @@ int smu_v11_0_get_enabled_mask(struct smu_context *smu,
		uint32_t *feature_mask, uint32_t num)
		{
		uint32_t feature_mask_high = 0, feature_mask_low = 0;
		struct smu_feature *feature = &smu->smu_feature;
		int ret = 0;

		if (!feature_mask \|\| num < 2)
		return -EINVAL;

		if (bitmap_empty(feature->enabled, feature->feature_num)) {
		ret = smu_send_smc_msg(smu, SMU_MSG_GetEnabledSmuFeaturesHigh);
		if (ret)
		return ret;
		@@ -856,6 +858,10 @@ int smu_v11_0_get_enabled_mask(struct smu_context *smu,

		feature_mask[0] = feature_mask_low;
		feature_mask[1] = feature_mask_high;
		} else {
		bitmap_copy((unsigned long *)feature_mask, feature->enabled,
		feature->feature_num);
		}

		return ret;
		}
		@@ -867,13 +873,12 @@ int smu_v11_0_system_features_control(struct smu_context *smu,
		uint32_t feature_mask[2];
		int ret = 0;

		if (smu->pm_enabled) {
		ret = smu_send_smc_msg(smu, (en ? SMU_MSG_EnableAllSmuFeatures :
		SMU_MSG_DisableAllSmuFeatures));
		if (ret)
		return ret;
		}

		if (en) {
		ret = smu_feature_get_enabled_mask(smu, feature_mask, 2);
		if (ret)
		return ret;
		@@ -882,6 +887,10 @@ int smu_v11_0_system_features_control(struct smu_context *smu,
		feature->feature_num);
		bitmap_copy(feature->supported, (unsigned long *)&feature_mask,
		feature->feature_num);
		} else {
		bitmap_zero(feature->enabled, feature->feature_num);
		bitmap_zero(feature->supported, feature->feature_num);
		}

		return ret;
		}