Commit c1bfe9c8 authored by Jean-Baptiste Maneyrol's avatar Jean-Baptiste Maneyrol Committed by Jonathan Cameron
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iio: imu: inv_mpu6050: add all signal path resets at init



Old chips using spi require for a full reset to manually reset
all signal path. This does not harm when using i2c so do it
inconditionally. Exclude i2c only chips.

Signed-off-by: default avatarJean-Baptiste Maneyrol <jmaneyrol@invensense.com>
Signed-off-by: default avatarJonathan Cameron <Jonathan.Cameron@huawei.com>
parent 5621a63a
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+18 −0
Original line number Diff line number Diff line
@@ -1146,6 +1146,24 @@ static int inv_check_and_setup_chip(struct inv_mpu6050_state *st)
	if (result)
		return result;
	msleep(INV_MPU6050_POWER_UP_TIME);
	switch (st->chip_type) {
	case INV_MPU6000:
	case INV_MPU6500:
	case INV_MPU6515:
	case INV_MPU9250:
	case INV_MPU9255:
		/* reset signal path (required for spi connection) */
		regval = INV_MPU6050_BIT_TEMP_RST | INV_MPU6050_BIT_ACCEL_RST |
			 INV_MPU6050_BIT_GYRO_RST;
		result = regmap_write(st->map, INV_MPU6050_REG_SIGNAL_PATH_RESET,
				      regval);
		if (result)
			return result;
		msleep(INV_MPU6050_POWER_UP_TIME);
		break;
	default:
		break;
	}

	/*
	 * Turn power on. After reset, the sleep bit could be on
+6 −0
Original line number Diff line number Diff line
@@ -245,7 +245,13 @@ struct inv_mpu6050_state {
#define INV_MPU6050_BIT_I2C_SLV3_DLY_EN     0x08
#define INV_MPU6050_BIT_DELAY_ES_SHADOW     0x80

#define INV_MPU6050_REG_SIGNAL_PATH_RESET   0x68
#define INV_MPU6050_BIT_TEMP_RST            BIT(0)
#define INV_MPU6050_BIT_ACCEL_RST           BIT(1)
#define INV_MPU6050_BIT_GYRO_RST            BIT(2)

#define INV_MPU6050_REG_USER_CTRL           0x6A
#define INV_MPU6050_BIT_SIG_COND_RST        0x01
#define INV_MPU6050_BIT_FIFO_RST            0x04
#define INV_MPU6050_BIT_DMP_RST             0x08
#define INV_MPU6050_BIT_I2C_MST_EN          0x20